Investigation of Process Feasibility / Compatibility and Solder Joint Reliability of Tin-Lead Dippable Solder Paste Ball Grid Array (BGA) Component Rework/Repair

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This paper is an examination of the process feasibility,solder joint reliability,and materials/process compatibility of a dippable solder paste material for an area array component rework/repair process. The Ball Grid Array (BGA) components in this investigation were reworked according to typical production procedures and a new dipping procedure using the AirVac Onyx 29 BGA rework machine. The components were tested for thermal cycle solder joint reliability and flux process compatibility. The thermal cycle and flux process compatibility test results demonstrated that the dippable solder paste material and BGA rework process were acceptable for IPC Class 3 High Performance products.

Author(s)
David Hillman,Douglas Pauls,Andrew Steinmetz
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Zoom Fixtures for ATE

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This paper details a break-through technology for automatic test equipment (ATE) fixtures. These new fixtures address the current market needs of - "faster,cheaper,and smaller". The new fixture design decreases typical fixture turn times to between 2 and 4 days on average. Fixture prices are also significantly reduced by approximately 50% to 60%. And,the technology also provides improved pointing accuracy,for testing targets down to 0.015" diameter targets on a 0.5 mm pitch. This paper will detail how these advances were achieved and discuss the technology in detail.

Author(s)
Gary F. St.Onge
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Advances in Automatic Monitoring of Stencil Printing Processes

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The electronics assembly industry has long wished for and made great advancements toward developing a true,closed-loop automatic print verification and process monitoring technology. While significant progress has been made,many hurdles remain to be overcome. Recent developments in on-board inspection technology,however,have pushed the “lights-out” printing concept even closer to becoming reality.
This paper will present data on a novel print verification technology that uses a series of sensors to capture the full board image,analyze the data and accept or reject the print – all in real time. The system compares the actual print to that of the PCB?s Gerber data to assess accuracy and paste presence/absence,among other print components,and can be integrated with additional machine performance tools to make the printing platform even more intuitive. By enabling the print and inspection processes to run concurrently and deliver 100% verification at full line speed,production rates can be maintained and throughput is exponentially improved. The technology can have a profound impact on cost reduction,as faulty boards are isolated and removed from the line at the printing phase instead of traveling fully downstream to final assembly. Additionally,integrating such high-speed and powerful inspection technology onto the printing system eliminates the requirement for a dedicated,in-line SPI machine,and saves even more resource including training and floor space.
The inspection component of this next-generation technology can also be combined with verification and traceability tools to confirm all print inputs and outputs and trace materials,boards and processes to origination. This is a requirement for many high-value applications such as medical,defense and aerospace and has tremendous benefit for traditional EMS and OEM assembly operations as well.
These details along with future closed-loop printing platform developments will be presented.

Author(s)
Dick Johnson
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Robust Automated Void Detection in Solder Balls and Joints

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Accuracy in solder balls and joint void detection is very important. If voids are incorrectly identified,board yield will be affected by incorrect scrapping and rework. Voids are difficult to detect using manual inspection alone. One current solution to make voids visible involves the use of a 2D x-ray system to image the boards. Some existing x-ray inspection systems have void detection algorithms that require the use of intensive,time consuming,fine tuning operations. These algorithms typically use two different global thresholds to segment the balls or joints and the voids using operator trial and error. However,using global thresholding over the entire image is invalidated due to varying image brightness. Existing methods also eliminate balls or joints that are partially occluded by other components due to difficulties in segmentation. The results are that many voids that can be easily observed by the human eye are missed by the existing automated methods.
In this paper,a robust,accurate,and automatic void detection algorithm is proposed. The method is applicable to either Pre SMT solder balls or post SMT solder joints. For simplicity,the term balls will be used throughout the document. The proposed method is able to detect voids with different sizes inside the solder balls,including the ones that are occluded by board components and under different brightness conditions. The proposed method consists of segmenting individual balls,extracting occluded balls,and segmenting voids inside the solder balls. The segmentation of the individual balls is achieved by using the proposed histogram and morphological based segmentation method. A voting procedure is used to segment the occluded balls where the pixels inside the occluded area are checked to obtain candidate pixels representing the occluded joint’s or ball’s centroids. An independent edge detection procedure is used to get candidate voids inside individual balls. Mathematical morphology operations are used to locate all possible valid voids and remove non-void areas. The proposed algorithm was applied to 3 different Intel products. The results of the proposed method were compared to the results obtained by an automated algorithm in an existing state-of-the-art 2D x-ray inspection system,the results obtained by trained operators from 2D x-ray images,and the results obtained by trained operators from 3D CT scan images. The results (pre SMT solder balls) show that the proposed method is capable of successfully locating all possible visible voids inside the solder ball even the ones that were missed by using other methods as well as those that are hard to see by the human eye. The results also
show a high correlation with ground-truth data obtained from 3D CT scan and experienced operators. The algorithm is fully
automated,benefits the manufacturing process by reducing operator effort and provides a cost effective solution to improve
output quality.

Author(s)
Asaad F. Said,Bonnie L. Bennett,Lina J. Karam,Jeff Pettinato
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Cleanliness of Stencils and Cleaned Misprinted Circuit Boards

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The effectiveness of cleaning stencils and misprinted/dirty printed circuit boards can be effectively monitored. This can be done by washing known clean circuit boards and then checking to see if they have stayed clean as a result of the washing process. The monitoring can be done with conductivity equipment. Control limits can be set once enough initial data is collected. Correlations between machine maintenance and the volume of boards washed could be determined.

Author(s)
Bev Christian
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Case Study – “Limitations of DI-Water Cleaning Processes”

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While most cleaning processes in the global electronics manufacturing industry still rely on cleaning with DI-water only (for OA flux removal),recent studies suggest that water is beginning to reach its cleaning limitation,favoring the use of chemically assisted cleaning processes. The increased use of water-soluble lead-free solder requires more activators and higher soldering temperatures,which result in more burnt-in fluxes and produce water insoluble contamination. DI-water alone has a limited to no ability to solubilize non-ionic residues on the board’s surface.
These findings coincide with the use of smaller,more densely packed components which further limit the effectiveness of pure DI-water. Due to its high surface tension of over 70 dynes/cm,water cannot effectively penetrate underneath low standoff components. Chemistry assisted cleaning processes,however,can reduce the surface tension to 30 dynes/cm and below and therefore eliminate penetration problems.
This technical case study complements the authors’ initial in-house findings by comparing them to actual production assemblies and conditions. The lead engineering team at a participating customer site designed this comprehensive blind study to determine removability with DI-water versus various chemistry supported systems. The findings revealed significant experimental data,which shed much needed light on this emerging industry challenge.

Author(s)
Harald Wack,Umut Tosun,Ravi Parthasarathy,Jigar Patel
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

OA Flux Cleaning Studies on Highly Dense Advanced Packages Parameters

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Cleaning flux residues post soldering has been a high reliability criterion practiced by assemblers of military,aerospace,automotive,medical devices and other value offerings. Highly dense advanced packages reduce spacing between I/Os and
standoff heights. The complexity of removing flux residue increases,while elevating the risk of white residue under low
standoff (gap) components. To address this concern,many electronic assemblers use water soluble solder paste and clean
post soldering. The purpose of this factorial designed experiment is to evaluate multiple water soluble flux materials and cleaning chemistries,including DI water only,to determine the best chemical properties for removing lead-free water soluble flux residues. The optimal process parameters will be defined with data findings analyzed and presented using statistical analysis and models.

Author(s)
Mike Bixenman
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Chemical “Kick Start” for the Autocatalytic Formaldehyde-Free Electroless Copper Plating Process

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The present work describes the use of additives in formaldehyde-free copper solutions to improve the start reaction of
electroless copper deposition.
Conventional electroless copper plating solutions contain a copper salt,one or several complexing agents,a reducing agent,a pH adjusting agent as well as stabilizers and other additives.
At the present time formaldehyde is the established reducing agent in electroless copper metallization of plated throughholes.
Because of its environmental impact,there is a need to replace formaldehyde. Many alternatives have been suggested but some of them pose a greater health and safety threat than formaldehyde does and some alternatives are not economically viable.
In this investigation,the more environmentally friendly glyoxylic acid is used as an autocatalytic reducing agent. However glyoxylic acid is more expensive and causes undesirable side reactions. Consequently,it leads to a rise in the price of the copper plating process. In order to keep process costs under control,the concentration of glyoxylic acid in the copper bath should be reduced without affecting the quality of the copper deposits.
Therefore,additives are introduced which can compensate for the lower reducing agent concentration,and thus the lack of essential electrons for the copper deposition. On palladium-activated base material,the additives react with the palladium and generate additional electrons in the initial phase of the deposition. Thus,the adequate supply of electrons from two sources permits the deposition of a homogeneous and compact copper layer.

Author(s)
Edith Steinhäuser,Lutz Stamp,Lutz Brandt,Tafadzwa Magaya
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Comparison of the Electrochemical and Physical Properties of Nanocrystalline Copper Deposition in the Fabrication of Printed Wiring Boards

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Typical electrodeposition of conventional metals produces deposits that are polycrystalline in nature,comprised of many crystal grains separated by grain boundaries. Adding grain refiners to a plating solution and employing pulseplating techniques can reduce the grain size and produce a nanocrystalline deposit. The average grain size of the nanocrystalline copper deposit is about 100 nanometers. This is about 80 times smaller than the conventional deposit
average grain size of 2 microns. Nanocrystalline copper deposits have negligible porosity and superior physical,mechanical,and electrical properties. The hardness,strength and wear resistance of the deposit are greatly enhanced. Stress corrosion cracking is virtually eliminated,while the hydrogen diffusivity and solubility are increased. This paper compares the electrochemical,mechanical,and physical properties of nanocrystalline copper deposits with
conventional polycrystalline copper deposits on printed wiring boards (PWB). Test boards were evaluated after thermal shock and thermal stress tests. Copper thickness and uniformity are evaluated both by microsection and Xray fluorescence measurement techniques.

Author(s)
David M. Lee,John T. Folkerts,Frank L. Collins,Ann E. Dietrich,Allen Keeney
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010

Nanotechnology for Lead-Free PWB Final Finishes with Organic Metal

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The use of an Organic Metal finish only a few nano-meters deposited onto copper pads of printed circuit boards provides effective protection against oxidation and preserves solderability. The Nano layer has a thickness of only 50 nm,and contains the Organic Metal (conductive polymer) and a small amount of silver. Being more then 90% (by volume),Organic Metal is the major component of the deposited layer; Ag is present equivalent to a thickness of 4 nm. This Organic Metal – Ag complex final finish performs as well as any of the established surface finishes with a significant reduction in energy and environmental impact.

Author(s)
Jim Kenny,B. Wessling,Karl Wengenroth,Joe Abys,John Fudala,Robert Farrell
Resource Type
Technical Paper
Event
IPC APEX EXPO 2010