Testing – Understanding the Proper Testing Processes and Requirements for Electronics,Electronic Components and Printed Circuit Boards

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As the need for electronics,electronic components and printed circuit boards becomes more important; the testing of products for these industries becomes a critical component. New materials,new components and new processes all play a vital role in the growth of the electronic and printed circuit board markets. Understanding the industry test guidelines and requirements are essential to product safety and product development. This presentation will give relevant information and guidance to the interconnection industry on what to look for in product testing. We will review industry test requirements and standards along with typical electronic company test standards for their products. Additionally the presentation will cover proper chamber selection,correct testing set up,air flow design and best test practices for the industry. With new markets and products being developed at a rapid pace; industry and company test standards will become part of what each manufacturer must understand. New test standards will be developed to secure both safety and industry guidelines that manufacturers must follow. As manufacturers develop new products for their markets; engineers,R&D managers,quality managers,product managers and product testing personal will need to be educated and knowledgeable of the testing guidelines so they can engineer,specify and build their products around these test standards. This presentation will give them a solid background in awareness of testing,testing requirements and testing standards.

Author(s)
Aaron Robinson
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

Effect of Silicone Conformal Coating on Surface Insulation Resistance (SIR) For Printed Circuit Board Assemblies.

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Conformal coatings are considered a method of providing corrosion protection to electrical assemblies used in high-humidity or harsh environments. They are applied to PCBs for various reasons: to protect from moisture and contamination,to minimize dendritic growth,to provide stress relief,and for insulation resistance. These contribute to more durable handling,enhanced device reliability,and reduced warranty costs. Increased miniaturization of new circuit board designs requires flexible,low stress coating material to protect delicate components and fine-pitch leads. Silicone conformal coatings offer many advantages that address the general trend of ongoing PCBs designs,such as: high flexibility and low modulus to reduce stress on delicate or small components; high humidity resistance; wide operating temperature range that makes them suitable for extreme temperature cycling applications; excellent electrical properties; UV resistance; good chemical resistance,and adhesion to many common substrates used in electronics. Printed circuit board (PCB) coupons coated with three different silicone conformal coating formulations were exposed to temperature/humidity/bias conditions (85 °C / 85% RH/ 50 v) for 500 hours in order to evaluate the effects of conformal coating on surface insulation resistance (SIR). The goal of SIR testing is to identify possible failures in the functioning of printed circuit boards due to electro-chemical failure mechanisms,such as unacceptable electrical leakage under high humidity conditions,corrosion and metal migration,before they can occur on actual parts in the field. Results from this SIR testing are reviewed and discussed through this paper.

Author(s)
Carlos Montemayor
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

Correlation of Sir,Halide/Halogen,and Copper Mirror Tests

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With the advent of RoHS and WEEE and the concern of some companies to eliminate halogen-containing compounds from their products,it is vital to have an understanding of halogen compounds and how to detect them. Halogens are a series of nonmetal elements from Group 17 in the periodic table. These elements are fluorine,chlorine,bromine,iodine,and astatine. A halide ion is a halogen atom bearing a negative charge. Halides can be part of the flux activator system that aid in oxide removal in either a solder paste or flux for wave soldering.
Halide content can be determined by qualitative or quantitative tests. The silver chromate method is a quick and inexpensive qualitative test method used to determine halides in a flux. This test is performed by placing the flux on silver chromate test paper. The halides in the flux react with the silver chromate and produce a characteristic color change on the test paper. A quantitative measure of halides is done by ion chromatography. This quantitative test is quite expensive and time consuming.
Test methods have also been developed to determine the activity of the fluxes in solder paste and wave solder. Most commonly used are the copper mirror and SIR (surface insulation resistance) tests. Copper mirror testing determines the activity of the flux by the effect the flux has on bright copper mirror films which have been vacuum deposited on clear glass. Based on J-STD 004B,the flux can be classified based on its activity levels as determined by this test.
SIR is an electrical test that measures a change over time in the electrical current between electrodes on the surface of a PCB. It is performed at high temperature and humidity levels,typically 85°C and 85% RH. Ionic residue,left on the PCB after reflow,from flux activators may cause low (i.e. poor) SIR readings.
This paper will discuss the theories behind these test techniques,their differences,and how the presence of halides in the flux activators will affect the SIR and copper mirror results

Author(s)
Nicole Palma,Ronald Lasky
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

An Evaluation of the Insulation Resistance and Surface Contamination of Printed Circuit Board Assemblies

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The overall effectiveness of 20 circuit board assembly processes,made up of 4 solder/flux combinations and 6 cleaning processes was investigated by using in-situ surface insulation resistance measurement,resistivity of solvent extract test,ion chromatography test,and optical inspection. The cleanliness of each process was represented by one board produced according to the IPC B-52 layout and design. Together with 4 unpopulated control boards,24 boards in total were investigated. Surface insulation resistance test evaluated the propensity of a printed circuit board to develop leakage currents and undergo metal migration when subjected to temperature-humidity-bias conditions of 40°C and 90 ± 3% relative humidity (consistent with IPC TM 650-2.6.3.7) and 5 V. The resistivity of solvent extract test inspected the cleanliness of a printed circuit board by extracting the ionizable surface contaminants and quantifying them in terms of an equivalent amount of sodium chloride. The ion chromatography test identified the specific types and amounts of ions present on the surface of a printed circuit board. Optical inspection was a visual check of the cleanliness and possible defects associated with manufacturing processes. By taking into account all the results of the 4 methods,this study clearly shows a relative ranking of the 20 samples provided,and a pass-fail assessment of the 20 processes. A good correspondence between surface insulation resistance and surface contamination levels was observed. The conductivity of the extract was consistent with the presence of ion types and concentrations,especially inorganic anions. This study also indicates that a good solder/flux combination must be paired with an appropriate cleaning process in order to be successful.

Author(s)
Xiaofei He,Michael H. Azarian,Mark Kostinovsky,Michael G. Pecht
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

Low Cycle Fatigue Behaviour of Multi-joint Sample in Mechanical Testing

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This paper explores the behaviour of a copper test vehicle with multiple reflowed solder joints,which has direct relevance to ball grid arrays (BGA) and high density interconnect structures. The paper explores the relative stress conditions on the distributed joints and the sensitivity to ball joint shape. The joints were exposed to isothermal fatigue,which was produced by a mechanical load that induced a cyclic shear stress across all the joints. The same structures were modelled using finite element analysis. The loading response distribution profile through the joints was analysed. The regions of likely failure were identified to be along the shear band and at the stress concentration areas in the corners of the joints. Failure of the individual joints was analysed by quantifying the accumulated creep strain per cycle. Solder joint models of three different shapes were investigated: rectangular,convex and concave shapes. This analysis has shown that less damage is found in concave shaped joints,indicating that BGAs would have more damage than the rectangular joints tested here. Results have also shown that more damage occurs in the outer joints as a vertical component appears due to a turning moment on the copper test vehicle. This behaviour could affect the external joints of large components,where the same vertical stress component may arise due to the differential CTE of the PCB and BGA component.

Author(s)
C.P. Hunt,O. Thomas,D. Di Maio,E. Kamara,H. Lu
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

Drop Test Performance of Bga Assembly Using Sac105ti Solder Spheres

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Board-level drop test performance was evaluated and compared for the following four different solder combinations in
BGA/CSP assembly: 1) SnPb paste with SnPb balls,2) SnPb paste with SAC105Ti balls,3) SAC305 paste with SAC105Ti
balls,and 4) SAC305 paste with SAC105 balls. The presence of Ti improved the drop test performance significantly,despite
the voiding side effect caused by its oxidation tendency. It is anticipated that the voiding can be prevented with the
development of a more oxidation resistant flux. The consistently poor drop test performance of 105Ti/SnPb is caused by the
wide pasty range resulting from mixing SAC105Ti with Sn63 solder paste. The effect of Ti in this system is overshadowed
by the high voiding outcome due to this wide pasty range material. In view of this,the use of a SAC105 BGA with an SnPb
solder paste is not recommended,with or without the Ti addition. High reflow temperatures drove the fracture to shift to the
interface at the package side,presumably through building up the IMC thickness beyond the threshold value. A lower reflow
temperature is recommended. The electrical response is consistent with the complete fracture data,but the complete fracture
trend is inconsistent with that of the partial fracture trend,and neither data can provide a full understanding about the failure
mode. By integrating the complete fracture and the partial fracture into a “Virtual Fracture”,the failure mechanism becomes
obvious and data sets become consistent with each other.

Author(s)
Weiping Liu,Ning-Cheng Lee,Simin Bagheri,Polina Snugovesky,Jason Bragg,Russell Brush,Blake Harper
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

Choosing a Low-Cost Alternative to Sac Alloys for PCB Assembly

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Developing low-cost alternatives to near-eutectic SAC alloys for Pb-free assembly is crucial to continue producing affordable electronics products. Metals prices,especially silver,have been on the rise,and will likely stay at their near historic high levels. Solder alloys with lower silver content have been considered,with trade-offs in performance,but are there alternatives?
There are many reasons to consider alternative Pb-free alloys to SAC305. Several new alloys have been recently introduced,while others,which had little popularity in the past,are showing more potential due to changes in the industry. The question is: how much do subtle variations in alloy composition affect the performance and process requirements of PCB assembly? This paper will compare some of these alloys side-by-side and discuss whether existing processes need to be modified for alternative alloys.

Author(s)
Brook Sandy,Ronald Lasky
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

iNEMI HFR-Free PCB Materials Team Project: An Investigation to Identify Technology Limitations Involved in Transitioning to HFR-Free PCB Materials

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In response to a growing concern within the Electronic Industry to the transition to Halogen-Free laminates (HFR-Free)
within the Client Market space (Desktop and Notebook computers) iNEMI initiated a HFR-Free Leadership Workgroup to
evaluate the readiness of the Industry to make this transition. The HFR-Free Leadership WG concluded that the electronic
industry is ready for the transition and that the key electrical and thermo-mechanical properties of the new HFR-Free
laminates can meet the required criteria. The HFR-Free Leadership WG verified that the laminate suppliers can meet the
capacity demands for these new HFR-Free laminates and developed a “Test Suite Methodology” (TSM) that can facilitate the
comparison and choice of the right laminate to replace brominated FR4 in the Client space.

Author(s)
John Davignon
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012

iNEMI HFR-Free Signal Integrity Project: An Investigation to Identify Degradation of Electrical Signals in HFR-Free PCB Materials

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Recent environmental concerns over the safety of the halogenated flame retardants (HFR) used in commonplace FR4 printed
circuit boards (PCB) have prompted market demand for HFR-free computer systems. Unfortunately,the critical electrical
properties of most HFR-free dielectrics on the market in 2009 made high-speed bus designs such as DDR3 & PCIe3
problematic without increasing the cost of the system. The iNEMI HFR-Free Signal Integrity Working Group was
established in early 2009 with membership from 16 OEM,ODM and laminate supplier companies to address these industry
concerns. This effort has helped pave the way for member companies to produce “green” HFR-free product lines by: 1)
Uniting a large portion of the industry on the problems associated with high-speed bus design on HFR-free PCB’s,2)
Defining a common approach to mitigate the signal integrity challenges and 3) Communicating a unified set of desired
electrical properties to the major laminate manufacturers to produce higher volumes and lower cost HFR-free dielectric
materials suitable for high-speed bus design.

Author(s)
Stephen Hall,Michael Leddige,Scott Hinaga,David Senk
Resource Type
Technical Paper
Event
IPC APEX EXPO 2012