While it has long been known that the Cu6Sn5 intermetallic that plays a critical role in the reliability of solder joints made with tin-containing alloys on copper substrates exists in two different crystal forms over the temperature range to which electronics circuitry is exposed during assembly and service,it has only recently been recognized that the change from one form to the other has implications for solder joint reliability. Under equilibrium conditions the change from the hexagonal to monoclinic form occurs in the cooling solder joint at 186°C. However,cooling rates after common commercial soldering processes are typically faster than the rate that would permit complete transformation under such equilibrium conditions. In this paper the authors report a study of the effect of cooling rates on Cu6Sn5 crystals. Cooling rates from 200°C ranged from 10°C/minute to 100°C/minute and the effect of isothermal ageing at intermediate temperatures was also studied. The extent of the phase transformation after each regime was determined using synchrotron X-ray diffraction. The findings have important implications for the manufacture of solder joints and their in-service performance.

In this paper,we report on a comprehensive study regarding the morphology evolution and voiding of SnAgCu solder joints
on the central pad of two different packages – QFN and an Agilent package called TOPS – on PCBs with a Ni/Au surface
finish. Samples were isothermally aged at the equivalent of 0,2,7 and 14 years service life. Representative solder joints
were cross-sectioned and analyzed using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy
(EDX) in order to investigate the evolution of the solder joint morphology as a function of Au content and isothermal aging.
IMC thickness was measured. The effect of Au content on the void percentage was studied as well. The results show that if
copper is available to dissolve into the solder joint,the AuSn4 IMC from the bulk does not migrate to the interface as a result
of thermal aging. The IMC thickness grew with aging as expected,however with Cu base metallization the IMC was
dominated by Cu6Sn5,and with Ni base metallization on both sides of the joint the IMC was dominated by AuSn4. Voiding
analysis showed that thick Au metallization on thermal pads leads to more voiding and larger standoff height.

The continuous progression toward portable,high frequency microelectronic systems has placed high demands on material
performance,notably low dielectric constants (Dk),low loss tangent (Df),low moisture uptake,and good thermal stability.
Epoxy resins are the workhorses of the electronic industry. Significant performance enhancements have been obtained
through the use of PPE telechelic macromonomers with epoxy resins. However,there is a ceiling on the performance
obtainable from epoxy-based resins. Therefore,non-epoxy based dielectric materials are used to fulfill the need for higher
performance. The focus of this paper is on vinyl monomers such as triallyl isocyanurate (TAIC) and t-butyl styrene/divinyl
benzene (TBS/DVB) and their use with vinyl modified PPE macromers. When TAIC and TBS/DVB are cured by
themselves,the resultant material was extremely brittle. However,the use in combination with vinyl modified PPE
macromers,resulted in dielectric materials that exhibited major increases in toughness,very low dielectric properties,high
glass transition temperatures (Tg),and very low moisture absorption. Printed wiring boards made from a combination of vinyl
monomers and the PPE engineering macromonomer exhibited significant performance advantages over epoxy and modifiedepoxy
materials.

Over the past few years a new family of laminate systems has been developed to face the increasing physical demands of
withstanding Pb-free soldering processes used in the assembly of RoHS compliant products. Many of the materials have been
found to perform satisfactorily for consumer type products where reflow temperatures peak around 245°C. However the high
end PWB designs for the telecommunicat ions and IT equipments typically tend to be more complex,thicker and therefore
have a much higher thermal mass than consumer products. In order to apply sufficient heat to enable satisfactory solder
reflow of surface mounted devices,the temperature of the printed wiring board can peak at up to 260°C. Add to that the
complexity of the board (typically double side assembled) and the requirement to be able to repair boards,then it is highly
possible that boards throughout their manufacturing cycle could see up to 5 thermal excursions up to this 260°C level
withstanding 20~30 seconds over 255°C. The ability of laminate systems to withstand the combined thermal exposure without
degradation or delamination and at the same time exhibiting consistent electrical properties is essential.
To meet the demand,a novel thermoplastic resin modified multifunctional epoxy system material has been developed. Silica
fillers have been carefully selected for ensuring the lower CTE. The material shows an outstanding heat resistance,reliabili ty
and toughness performance with complex BGA design (Pitch 0.8mm,through hole d iameter 0.25mm) on thicker (Thickness:
4mm PTH board and 3.2mm HDI board) PWB board comparing with currently available Pb -Free compatible materials. The
dielectric properties and other properties of this material will be presented.

An evaluation of four FR4 laminates in commonly used stack-ups was done to determine their survivability for the Pb-free HASL process followed by a worst case Pb-free manufacturing environment of 6 X reflow @ 260°C and 1 X wave @ 270°C. The work also includes a laminate compatibility study in a Pb-free hot air solder leveling (HASL) profile.

• Inspection of integrated power electronics = sophisticated test task
• X-ray inspection based on 2D / 2.5D principles not utilisable
• Full 3D inspection with adapted image capturing and reconstruction is necessary for test task

Solder voiding in ball grid array (BGA) solder joints has been well characterized and documented in IPC-A-610 and IPC-
7095 which define industry recommended BGA solder workmanship criteria and methods of inspection. Solder voiding
limits associated with other,non-BGA,Surface Mount Technology (SMT) solder joint types however are neither well
defined nor well understood in the industry. According to IPC guidelines,the amount and size of solder voids are simply to
be specified by customer/vendor agreement. In the absence of well defined voiding criteria though,the morphology of solder
joint fillets seen in final visual inspection often becomes the sole arbiter of solder workmanship and quality. Among the
various SMT solder interconnect designs used in IBM applications,one of the more common SMT leaded structures is the
Gull Wing design found on SMT connectors. Three distinct types of solder voiding have been observed in these Gull Wing
solder joints: solder inclusion voids,solder exclusion voids,and solidification hot tears. The most prevalent of the three has
been inclusion voids,also known as solder process voids. Such solder inclusion voids in SMT leaded solder joints have been
observed using either IR/convection or vapor phase reflow processes. This paper provides definitions of the different voiding
types encountered in Gull Wing solder joint geometries. It further provides corresponding reliability data that support some
level of inclusion voiding in these solder joints and identifies the final criteria being applied for certain IBM Server
applications. Such acceptance criteria can be applied using various available x-ray inspection techniques on a production or
sample basis. The bulk of supporting data to date has been gathered through RoHS server exempt SnPb eutectic soldering
operations but it is expected to provide a reasonable baseline for pending Pb-free solder applications.

According to Prismark Partners,the use of QFNs is growing faster than any package type except for flip-chip CSPs. Prismark
projects that by 2013,32.6 billion QFNs will be assembled worldwide,which represents 15% of all IC packages.
However,QFNs can be a challenge to assemble,especially when it comes to voiding. In most QFN assembly processes,
solder paste is used as a means of attachment. This approach can be problematic,as excessive voiding often occurs due to the
lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such
voiding by increasing the solder volume of the joint without adding flux volume.
Adding preforms to an assembly process is very easy. Preforms are packaged in tape & reel for easy placement by standard
pick and place machines,right next to your components. The focus of this paper will quantify the preform requirements and
process adjustments needed to use preforms in a standard SMT process. In addition,experimental data showing void
reduction using preforms will also be presented.

The paper discusses on the problems faced by the Assembly,Test Manufacturing (ATM) plants of Intel Corporation for a certain Tape and Reel Process. The problem is generic across the other sister factories around the world. The complexity and high occurrence of the problem result in high customer returns and complaints. The problem was looked at by using Lean and TRIZ. We came up with a potential solution that was both elegant and at the same time would potentially solve the menacing issue at the same time the solution proposed surprisingly yields good returns.

In PCB industry,Optical Inspection has been grown rapidly in past decades. It is now playing an important role in manufacturing process. Most manufacturers are now using AOI machines to report defects on boards after photo-printing or etching. On the other hand,AVI (Automated Vision Inspection) which sometimes also called FVI (final vision inspection) is growing in a relatively fast pace,but not yet widely used in the industry.
AOI and AVI machines are different kind of machines with different functions,but their working principles are very similar. Many technologies of AVI are built up from AOI. This paper analyses on the combination factors of AOI and AVI to meet the inspection objective.
There are 3 parts in this paper. The first part focuses on the application of AOI and AVI and identifies all kinds of defects and boards which they can inspect. The second part compares the hardware and software of AOI and AVI machines. The commons and differences are found out. The third part studies of finding defects under the application and machine issues of AOI and AVI.
The PCB manufacturers are now using AOI and AVI machines to ensure the quality of their boards. Both machines are using cameras to visually find the defects.
What are the differences?
So,we will look into this with the following chapters:
1 – The operation factors of AOI and AVI.
2 – Features of their hardware and software.
3 – How the defects are found
Part 1 – The operation factors of AOI and AVI.