One of the most important aspects of the IPC Digital Twin standard, is the enablement of interoperability between many digital twin-based solutions across many facets of the holistic manufacturing technical and business process. In this session, we feature four distinct, though inter-related aspects of the IPC Digital Twin, intended to illustrate different areas in which the standard brings enhanced value and opportunity for current and future digital-twin-based solutions.

The purpose of conformal coatings is to protect printed circuit boards and components mounted on them from the deleterious effects of moisture, particulate matter and corrosive gases. The conventional method of testing the effectiveness of conformal coatings is to expose the conformally coated hardware to a corrosive environment for extended periods of time lasting many months and determining the mean time to failure. A quicker method that takes less than a week is the subject of this paper. In this method the corrosion rates of conformally coated thin films of copper and silver, exposed to a sulfur gas environment, are used to characterize conformal coatings. This paper describes the test chamber design and setup and investigates how the temperature and humidity impact the corrosion rates of conformally coated copper and silver thin films compared to uncoated films. Performances of acrylic, silicone and atomic layer deposition (ALD) conformal coatings were studied as a function of temperature and relative humidity. The test temperatures were 40 and 50 °C and the relative humidity levels were 15, 31 and 75%. Temperature affected the corrosion rates of conformally coated copper and silver thin films. Relative humidity had much less on corrosion rates. Significant differences in corrosion protection provided by the three coatings will be reported along with a discussion on the optimum test conditions.

DurafuseTM LT paste was designed as an alternative low temperature solder targeting at enabling hierarchy design for portable devices with good temperature cycling and superior drop-shock performance. It is formulated with the mixed solder powder technology to allow the paste reflowable at around 200oC or above. DurafuseTM LT formed solder joints with a melting temperature above 189oC and a plateau type reflow profile was recommended. Impact of reflow profiles on both drop shock and temperature cycling performance was investigated. The drop number increased with increasing peak temperature up to 210°C, presumably due to an improved homogeneity of solder joint. It also increased with increasing plateau time at peak temperature for temperature below 210°C. At 210°C, the drop number decreased with increasing plateau time, presumably due to increasing IMC thickness at pad interface. Homogeneous solder joints were more resistant to drop failure than mixed alloy system and could be attributed to better homogeneity for the former system. Regardless of reflow profile impact, DurafuseTM LT showed at least two-order-of-magnitude higher drop shock resistance than Bi-Sn-Ag solder. Using the optimized reflow profiles, DurafuseTM LT outperformed SAC305 in dropshock test. For LGA with homogeneous solder joint, DurafuseTM LT exhibited a characteristic life about 2.5X of BiSn0.4Ag. For chip resistor reliability in TCT, no significant difference in reliability could be discerned when comparing ENIG with OSP. DurafuseTM LT was slightly lower in reliability than SAC305. Higher peak temperature resulted in a better reliability for DurafuseTM LT. The chip size appeared to be an insignificant factor.

Key Words: Lead-free, Solder, Drop-shock, Low Temperature Solder.

Historically, evaluations of solder joint failures and solder joint reliability have been done with direct current (DC) methods, using event detectors or data loggers for high-frequency circuits. Direct high-radio frequency (RF) measurements of signal paths are potentially more sensitive to incipient circuit (or solder joint) failure due to mechanical changes which may affect return loss, insertion loss, or phase angle, well before complete solder joint failure. Here are compared the fault detection capabilities and detection speeds, of direct current resistance (RDC) to RF-based fault detection measurements to determine if RF signal loss could be a useful criterion for failure detection. In this paper, both high speed digital and analog RF circuits are considered.

Early S-parameter changes were observed, over time and thermal cycles, as the connectors were broken in from wear. Ultimately, the test circuits failed, due to cracks within the solder joints. The capacitance, and the capacitive reactance, of a partial crack in a solder joint was found to be substantially larger than the direct current resistance (RDC) due to even a tiny remaining amount of intact solder joint. The low resistance so dominates the circuit that the circuit changes are unmeasurable This paper was first presented at the 2021 IPC Apex Expo Technical Conference and published in the 2020 Technical Conference Proceedings. by RF techniques until the crack is fully open. Thus, while the failures in high-frequency circuits from solder joint cracking are expected to occur simultaneously, or even after the DC failures occur, they are undetectable until total decohesion within the solder joint. As a result, the detection of failures using RF monitoring (S-parameters) lags that of failure detection by DC resistance measurement when evaluated by cycles to failure.

The results presented in this paper should be of benefit to component manufacturers working to determine the reliability of their components on test boards, their original equipment manufacturer (OEM) customers concerned about the components and their attachment to actual product circuit boards, and EMS and test labs providing services to component suppliers and OEMs.

Rework of assembled boards is often a necessary but difficult proposition. The complexity of the rework increases with the number of components to be reworked. A specific case involves where many passives must be removed and replaced without damaging or de-soldering adjacent components. HDP User group formed a project team to look at a novel technology solution, photonic soldering. In this study photonic soldering was used as a pathway to achieve the desired rework process with minimal thermal load on adjacent functional components.

Photonic soldering is a process where high intensity light from a flash lamp is used as an energy source to uniformly heat up a large, exposed area. This process offers the ability to mask components, use of differences in absorption, changes in input power and variation of exposure duration over a few seconds to preferentially heat up specific areas of a working device. This technology enables quick and concurrent re-attach of multiple passives without affecting the other parts of the board.

For this work, the focus was on the use of SAC-305 solder alloy on FR4 substrates. The rework requirements for 0805 components were evaluated. Said components resided within millimeters of components that were to remain un-impacted during the rework process. This report evaluates the quality of the formed solder junctions through microscopy, cross sectioning and shear testing. Additionally, the neighboring solder joints were evaluated for any changes through similar evaluation processes. The findings show that the resulting rework is independent of any specific design and material choices.

This paper compares the thermal cycling performance of a quad flat no-lead (QFN) component and three different ball grid array (BGA) components assembled onto printed circuit board test vehicles of 4 different thicknesses from .040 to .125 inch thick that are otherwise identical for IPC 9701 test profiles of 0/100 ºC (TC1) and -40/125 ºC (TC3). Additionally, a limited comparison is provided for SnPb eutectic and SnAg3Cu0.5 (SAC305) Pb-free solders. The test results tend to support the improved reliability with thinner boards, but the correlation between PCB thickness and thermal cycling results are not always consistent or predictable. There are only a few cases where the reliability decreases monotonically with increasing board thickness as anticipated.

This Slide Show Utilizes the Cover Paper from the session.

This slide show discusses the use Power harvesting in conjunction with a typical battery and the efforts to manufacture this technology.  Many devices and sensors that would benefit from power harvesting are very small and located in harsh environments, such as inside the human body.  The Slides discuss some of the basics of how power harvesting can be achieved and calls for collaboration with the PCB industry.  

This slide show discusses inverters and power electronics for Heavy Machinery.  There is discussion of Wide Band Gap Powered Devices.  The purpose is increased efficiency gains.  A new material, silicone carbide, is discussed.  The capabilities of this material is presented.   

This Paper utilizes the introduction from the session as its paper then discusses Wide Bandgap Power Electronics 

All electronics products need a power source. Thereby power electronics has a fundamental impact on their design and integration, from materials and device up to systems and the applications they serve. They do this via a number of different paths, whether it be driving the bleeding edge of system size, weight, and power (a.k.a. – SWaP) specifications or determining the viability of battery-powered applications from autonomous vehicles to Internet of Things (IoT) little gadgets. The success of a system or product deployment is not only heavily dependent on the integration of intelligent power management (IPM) and shrinking size of its power supplies, but also how those power solutions interact with system loads and energy storage to optimize utilization for energy efficiency.

The session comprises three papers presenting a wide overview of the electronics market as seen through the lens of power electronics by focusing on three major areas of coverage, namely ‘power IoT’, energy storage and smart mobility, focusing primarily on IoT but the concepts and consideration being broadly applicable to a broad range of applications. Having a finger on the pulse of where power electronics industry stakeholders are headed is essential to maintaining a view on the horizon for what is technically achievable to form realistic expectations of application-driven marketing projections.

From automotive to semiconductor manufacturing, the bottlenecks for what is achievable are typically gated by power supply component size, form factor, and weight. From the perspective of power electronics, this mostly boils down to the power supply topology chosen, which can dictate switching frequency and therefore the minimum electrical/thermal requirements for key, passive components such as magnetics and capacitors. Given the broad range of skills, experience and expertise of the target audience, the technical details regarding things like topology selection and lower-level requirements will be abstracted into far simpler project requirements and drivers that directly impact passive component physical characteristics (e.g. – SWaP). The presentations attain to insight on how to translate seemingly complex power supply characteristics and bleeding-edge application needs into relatable information for their own area of focus, which can be brought back to teams and easily communicated to a broad range of stakeholders.