Nano Structuring Photoresist Adhesion Promoter for Improved Signal Integrity in the Modern HDI-PCB Fabrication

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The euphoria associated with the biggest technological step in the field of telecommunications in recent history, the new 5G mobile communications standard, not only made it necessary for OEMs to adopt this technology to keep up with the competition, but also shaped new requirements regarding the production of communication device circuit boards in order to be able to exploit the full potential of this and similar technologies.

In order to approximate this objective, it is essential that noise, distortion and losses of data signals are significantly reduced, since these parameters represent the controllable framework conditions of a telecommunication device, which are directly related to performance losses in terms of transmission speed, reception range and latency. However, common adhesion promoters used in several process steps in the manufacturing of classical PCBs, MLBs and HDI circuit boards are to some extent causing these problems due to the nature of their work mechanism – surface roughening. While these effects played a negligible role at lower frequencies, they now take center stage as distortion, losses and noise amplify with an increasing frequency and roughness. As a solution to this problem, the industry is primarily focused and eager to develop new dielectric materials and non-etching adhesion promoters for inner layer bonding applications. However, further opportunities exist in other production steps, where the signal integrity can still be improved by displacing commonly used micro-etching surface pretreatments for solder-mask and photoresist adhesion with low or non-etching alternatives. Unfortunately, this leads to a subsequent problem, namely lower adhesion, and low production yield due to a weaker mechanical bond.

This work describes the functional principle of a novel, anisotropic, nano-copper engraving, photoresist pretreatment for multilayer and advanced HDI PCBs. It is designed to optimize the signal integrity especially for high frequency applications, while ensuring excellent adhesion. This is done by a two-step surface treatment process, which involves an ordinary cleaner to remove mild oxidation and a special anisotropic conditioner, which selectively engraves nano cavities in z-direction, while maintaining the integrity of the surface dimension. The data indicates that this method can in fact combine the benefits of classical micro-etching and newer non-etching solutions and seems to be a viable addition to the high frequency PCB production process.

Key words: High frequency, micro-etching, adhesion promotor, signal integrity, semi additive process, dry film, photoresist, nano-engraving

Author(s)
Christopher A. Seidemann, Thomas Thomas, Fabian Michalik, Patrick Brooks, Wonjin Cho
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Influence of Process Parameters on Inkjet Printing of Silver Conductive Traces for Digital Additive Manufacturing of Flexible Electronics

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The results of a NextFlex project addressing barriers that are preventing inkjet printing from being adopted for prototyping and volume manufacturing of printed circuits, are presented. These barriers include resolution, thickness, reliability and endurance. Silver conductive nanoparticle inks were evaluated with Konica Minolta 512-SH industrial printheads using the PiXDRO LP50 printer platform. These 512-nozzle printheads have a nominal drop volume of 4 picoliters, which corresponds to a drop diameter of ~20 um. The focus was on determining process parameters that enabled printing of narrow and continuous traces in both the in-scan and out-of-scan directions. Treatment of the substrate by wiping with isopropanol, and varying the substrate temperature, drop spacing and printing speed were investigated, and resulted in the demonstration of two silver conductor print settings, for an ink that was developed for this printhead. Trace widths of 50-60 um and 60-70 um were demonstrated on PET substrates at 70 °C substrate temperature for 1-pixel-wide lines in the in-scan and out-of-scan directions, respectively, while diagonal traces were even narrower. The trace width could be controlled by having traces with 1, 2 or 3 pixel width. The resistivity of the annealed traces was determined to be ~2 times that of bulk silver, with excellent adhesion to the PET substrate. When printing with a new printhead and ink, even very narrow traces were printed with high yield. Procedures were establishedfor achieving reliable operation of the ink and printhead over 6 months, after which nozzles began to become non-jetting. Finally, inkjet printing of the NextFlex A15 Arduino-Compatible Microcontroller was successfully demonstrated, including the die-attach section, which has the narrowest features and spacing. This indicates that inkjet could potentially replace screen printing and laser machining processes that are currently used for printing this device.

Author(s)
Pratap Rao, Nicholas PrattMaryam Masroor Shalmani
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Reliability SoH Degradation and Life Prediction of Thin Flexible Batteries Under Flex-to-Install Dynamic Folding Dynamic Twisting and Battery Lamination

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The emergence of a variety of flexible portable electronics applications has led to increased attention to flexible power sources. Flexible electronics may be subjected to static and dynamic folding during operation in wearable applications that require attachment of applique skin-patch or integration of electronics into wearable garments. Power sources capable of sustaining static and dynamic stresses of daily motion without significant degradation in the battery capacity while subjected to various depths of charge for several charge-discharge cycles are needed for FHE applications. While the reliability of thick lithium-ion batteries has been previously studied for effect of C-rates and operating temperatures, the effect of static and dynamic U-flexing of thin lithium-ion power sources on the battery cycle life is not well understood. In this research study, the combined effects of deep and shallow depths of charge, static-folding, dynamic-folding and twisting load(s), under varying fold orientations and varying C-rates have been characterized for thin-flexible Li-Ion batteries. The lithium-ion batteries studied are less than 1mm in thickness. Effect of cathode chemistries including NMC and LCO have been examined on performance and reliability. Output parameters such as battery capacity and its degradation have been analyzed for battery state assessment. The use of lamination for thin-flexible battery integration has also been studied and compared with non-laminated batteries. Effect of lamination process conditions on the peel strength and the charge-discharge cycling degradation has been quantified. Laminated batteries have been subjected to static and dynamic fold tests as well so as to investigate the combined effect on capacity degradation. Finally, a life-prediction model has been developed for used in estimation of the battery capacity deterioration as a function of number of cycles, operating temperature, and depth-of-discharge. The model can be used to compute acceleration factors between accelerated test conditions and use-conditions. In addition, the model can be used to compute the needed test levels to assure reliability for typical use-cases.

Author(s)
Pradeep Lall, Ved Soni, Jinesh Narangaparambil, Hyesoo Jang, Scott Miller
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Electromechanical Testing of Flexible Hybrid Electronics

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Printed conductors and interconnects on compatible flexible or stretchable substrates are the foundation of flexible hybrid electronic systems that may include conventional silicon-based devices, discrete components, and printed radio frequency components such as microstrip lines, coplanar waveguides, capacitors, inductors, and antennas. The choice of substrates, inks, printing methods, encapsulants and post printing processes are often dependent on the application and its concept for operation. The development of reliable flexible hybrid electronics devices and systems require fundamental understanding of their behavior under different conditions.

In this paper, the performance of printed FHE components on flexible/stretchable substrates under mechanical and environmental stresses is discussed. Selected examples from studies of printed interconnects on compliant substrates are presented. Understanding the electromechanical behavior of FHE components and systems as they are exposed to small, moderate, and high repetitive strains, the impacts of handling during manufacturing, storage, and usage in thermal or isothermal conditions will ultimately lead to the creation of standard tests, expectations for reliable performance and FHE systems lifetime.

Keywords: Flexible hybrid electronics (FHE), electromechanical testing, printed electronics

Author(s)
Mark D. Poliks, Mohammed Alhendi, Behnam Garakani, Udara S. Somarathna, Gurvinder Singh Khinda
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Liquid Metal Enabled Soft and Stretchable Electronics

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This paper summarizes recent progress on utilizing liquid metals (LMs) consisting of gallium and gallium alloys for the electronics industry. While gallium is a component of existing electronic materials – such as semiconductors including Ga2O3, GaAs, and GaN – here the focus is on Ga in the liquid, metallic state. As the name implies, liquid metals uniquely combine many of the desirable attributes of metals and liquids1. Metals are fantastic thermal and electrical conductors. Liquids are soft, deformable, and can be manipulated in ways that simply are not possible with solids. Combined, these properties enable some truly unique applications for electronics including stretchable electronics2, self-healing circuits3, 3D printing4–6, and thermal interface materials.

Author(s)
Michael D. Dickey, Man Hou Vong, Jinwoo Ma, Lee Kresge, Christine LaBarbera, Amy Schultz, Benjamin Rolewicz, Miloš Lazić, Tim Jensen, Andy Mackie, Bob Jarrett, David Socha
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

A Novel Epoxy Flux to Prevent Hot Tears at VIPPO Solder Joints

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Via-in-Pad Plated Over (VIPPO) designs enable better signal quality and speed, but also cause unintended consequences. At VIPPO locations, with or without a solid copper-filled hole, the coefficient of thermal expansion (CTE) is typically around 17ppm/°C, which is significantly lower than that of the nearby non-VIPPO joints, which are approximately 45ppm/°C. For a double-sided printed wiring board (PWB), the difference in the CTE of the neighboring pads during heat rise in the second reflow could result in excessive tension on the joint at the VIPPO pad site, consequently resulting in a hot tear (HT) defect before reaching the melting point of the solder joints. An epoxy flux (EF) was developed to eliminate HT problems. Dipping EF does not work due to insufficient EF volume pickup and/or too much variation in the volume of the EF picked up. Dispensing EF exhibits good wetting and low voiding and also allows a sufficient volume of EF to fill the gap between the BGA and PWB, thus enabling a strong bonding force to nullify the ΔCTE factor, consequently eliminating the HT defect. The EF developed has the epoxy stress balanced around the solder joints and avoids joint drifting and solder extrusion problems. It cures fully in the reflow process and is not tacky upon touch. Commercial underfills that were tested did not work on preventing HTs from occurring due to joint drift and solder extrusion problems. Compared to other polymeric reinforcement materials, the EF dispense process minimizes the process steps; hence it has a lower cost solution than other reinforcement approaches.

Keywords: epoxy flux, hot tear, VIPPO, BGA, PWB

Author(s)
Lee Kresge, Elaina Zito, Chris Nash, and David Bedner
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Bio-Based Encapsulation Resins: Good for the Environment, Good for Your Environment

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There is increasing environmental awareness within society, affecting legislation, commerce, and industry. Nature offers an abundance of macromolecules and smaller molecular weight compounds that provide renewable sources for polymers, as opposed to crude oil. These renewable resources make ideal structural backbones for the synthesis of biopolymers, renewable-based monomers, fillers and additives, the key ingredients for polyurethane and epoxy thermoset materials. Research and development to promote innovative solutions that lead to a sustainable economy shows that bio-based materials can deliver a viable alternative to materials derived from crude oil, even in electronic encapsulation applications.

In this study, numerous accelerated life tests have been performed to evaluate the performance of novel bio-based polymers alongside standard synthetic grades. 1000-hour thermal ageing was performed on type IV specimens in accordance with ASTM D638. The tensile strength and elongation were measured before and after high temperature exposure for 100, 500 and 1000 hours to monitor the consistency in physical performance with long term exposure to high temperatures, to determine the maximum operating temperature. Standard B-24 SIR test coupons were coated with a thickness of 19.69mil (500μm) and tested at 185°F (85°C) / 85%RH in line with automotive testing. Surface and Volume Resistivity was measured according to ASTM D257 to determine the impact high temperature and high humidity, and saltwater immersion has on the electrical resistivity. The thermal conductivity was also measured according to ASTM D7984 to understand how the thermal conductivity of biogenic powders compares with commercially available non-renewable sources.

This comparative study concludes that bio-based polymers show superior performance to some synthetic materials without compromise on quality of performance, and that going ‘green’ can deliver performance advantages in underwater applications as well as hot and humid operating environments.

Author(s)
Beth Turner
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Massively Parallel Testing of Panelized Printed Circuit Board Assembly (PCBA)

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The cost of test has always been a main concern in the electronics manufacturing business. The recent proliferation of 5G, Internet of Things (IoTs) is driving the industry with smart devices on consumer products, medical products, industrial, as well as automotive industries. The printed circuit board assembly (PCBA) used is more sophisticated and packed with smaller components that are critical to the functionality of the device. However, the testing of these small boards is still dependent on test systems that were built for simple PCBA from 20 years ago. This may mean sacrificing test coverage in the hope that end-of-line functional testing will be able to catch these critical failures resulting in a lower throughput and increasing cost of test to the manufacturing industry.

The Massively Parallel testing of panelised PCBA will address the needs of the high-volume manufacturing by revolutionizing the throughput of the board test and applying a parallel test time for each board in the panel.

This paper discusses the parallel testing of up to 20 boards in a panel and the lower cost of test that can be achieved with the high throughput capability of the board test system.

The following tests that are tested in parallel are:

1.Open/Short test

2.Analog components test

                a.Resistor, Capacitor, Diode, Zener, transistor, FET, Inductor

3.Vectorless testing

                 a.Integrated Circuit Device, Connectors

4.Flash Programming (Erase, Program, Verify)

5.Voltage measurement

6.Functional test

                  a.CAN/LIN test

                  b.PXI test

The paper will also discuss the following: •Performance of high volume PCBA testing running in parallel

•Methods to increase PCBA test throughput without increasing cost

•Software to maximize the execution of parallel test

Author(s)
Jun Balangue
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

Increasing Efficiency of Functional Test Through the Use of Modular Test Components and In-Situ Methods for Cleaning of Test Probes and Electrical Calibration

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Instead of using a dedicated test platform, we are presenting methods of using modular and highly scalable components to perform functional testing on a printed circuit board assembly (PCBA). Functional end of line testing includes various test procedures - one of which involves the use of test fixtures and probes for conducted testing. While it may be tempting to use a dedicated test platform for one purpose, it may be more economical to use a "recyclable" approach where test fixture frames can be reused amongst various programs. This cassette-type approach is presented in this paper. We are also discussing how to easily add or remove components such as side-access mechanisms, pushrods etc. without intensive rework. Another topic of this presentation is the so called "in-situ" method for tasks such as cleaning/preventive maintenance of test probes and electrical calibration (i.e. the removal of unwanted effects which alter the RF/signal behavior of the system). In the past such tasks were pretty cumbersome but with newer technologies it is now possible to quickly manufacture cleaning and calibration aids in the field by using simple yet professional 3D printers. Our goal is to provide a holistic approach when it comes to testing and to reuse as many components as possible for various applications and programs. The idea is to recycle and refurbish without making compromises as far as the reliability of such a setup is concerned. With our contribution, engineers and other decision makers in the test process will learn how to use resources effectively to perform functional testing on their boards.

Author(s)
Matthias Zapatka
Resource Type
Technical Paper
Event
IPC APEX EXPO 2022

IPC Lauds Passage of “CHIPS and Science” Act; Electronics Industry Calls for a Holistic Approach to Reviving Domestic Electronics Capabilities

The following statement is issued by John Mitchell, IPC president and CEO, to comment on President Biden’s signature today on the “CHIPS and Science Act” in Washington, D.C.:

“Electronics manufacturers are pleased that this bill has become law, and they welcome the added innovation and resiliency it will bring to the global electronics supply chain. Billions of people will benefit from faster, more secure access to the next-generation technologies that this bill will help to speed to market.

“We are especially pleased that the bill includes at least $2.5 billion for a new National Advanced Packaging Manufacturing Program, which is aimed at making the United States a world leader in the post-Moore’s-Law only era of microelectronics. In the mid-1960s, Intel founder Gordon Moore predicted that the number of transistors that would fit into an integrated circuit would double about every two years, allowing the production of ever more powerful electronic products with greater cost efficiencies. Moore’s Law held true for decades, but today, is dying, and designers are increasingly relying on advancements in the packaging of silicon chips into ever-smaller integrated devices to achieve the greater functionality and efficiencies that they previously realized through silicon scaling. Today, packaging is king, and this legislation will help position the United States as a leader in this crucial technology.  [Read more about advanced packaging in this IPC report.]   

“Most urgently, the United States needs to invest in the development and production of the most advanced integrated circuit (IC) substrates, i.e., circuit board surfaces, for which there are only nascent capabilities domestically. 

“Companies engaged in standing up packaging and IC substrate facilities will have opportunities to tap into U.S. Government funding for R&D, new facilities, and workforce training through the programs funded by this bill. IPC is urging federal officials to structure these initiatives to deliver benefits holistically across the electronics manufacturing industry. Increasing domestic chips production without bolstering related manufacturing capabilities will actually lengthen the semiconductor supply chain, as chips made in California or Ohio will still need to be sent to Taiwan, Japan, or South Korea for packaging and assembly into finished products.

“It’s also important to keep in mind this is only one step in a long journey toward rebuilding the U.S. electronics manufacturing industry. The Executive Branch and Congress must continue to support – through long-term policy and funding – the larger ecosystem that sustains innovative, resilient, and secure electronics manufacturing.”  

For more information, visit www.IPC.org.