Metal-base printed circuit boards (PCBs),multilayer PCBs and embedded PCBs are constructed with a thin insulation layer.
In these PCBs,particularly those used for Power Electronics,the insulation layer is stressed under a high-strength electric
field. Metal-base PCBs are applied to 100-400 V power circuits for power transistor modules,general purpose inverters and
so on. Since the insulation layer is stressed under a high-strength electric field of approximately 1-3 kV/mm,the reliability of
the insulation layer is important. In order to investigate the migration process,we have studied the behaviour of ionic
impurities in the insulation layer of various PCBs by measuring space charge profiles using the pulsed electroacoustic (PEA)
method. Since space charge behaviour affects the internal field profile,the experimental results should contribute to the
insulation design of PCBs. Consequently,hetero charge accumulated in the vicinity of the electrode in the insulation layer of
two types of metal-base PCBs and two types of Aramid/Epoxy PCBs,and the electric field strength near each electrode are
enhanced two-three times more than the average field strength of 5 kV/mm and 10kV/mm. Two types of PCBs (Glass/Epoxy,
PTFE/Epoxy) do not exhibit significant electric field distortion under 5 kV/mm and 10 kV/mm. After thermal humidity bias
(THB) testing for 20 and 59 hours (DC 1250 V at 85°C and 70% RH),the space charge measurement detected a conductive
region that was formed in the insulation layer near the anode of the metal-base PCB A. Element distribution analysis verifies
that the conductive region is formed due to copper ionic migration. These results reveal that space charge measurement can
carry out a non-destructive observation of the growth of copper migration.

The 2002 International Electronics Manufacturing Initiative (iNEMI) Optoelectronics roadmap anticipated a cross-over in
cost-performance whereby a system using optical transmission of high speed signals would have lower overall “cost” than a
pure electrical system of equivalent function. In 2003,iNEMI formed a task group to investigate this cross-over point via cost
modeling analysis. The activities to date have been to adapt and verify an existing cost model for copper-based PCBs and
develop an electrical backplane technology roadmap to 40 GHz,with logical combinations of bus type,connectors and signal
conditioning chip sets. We are currently reviewing the relevant optical technologies,including optical fiber,fiber flex or
embedded polymer waveguide,optical connectors and transceivers to develop the equivalent optical roadmap. This
presentation will be a work-in-progress report on the iNEMI project activities with the goal of developing cost and
performance models to compare different designs of electrical and optical backplanes.

This paper summarizes research performed by the NEMI (National Electronics Manufacturing Initiative) Fiber Optic Signal
Performance Project team. The project focused on the development of a cleanliness specification for single mode connectors.
The influence of two grades of Arizona road dust on optical performance of single mode fibers is investigated.
The researchers record insertion loss,return loss,and fiber optic microscope images for each connector pair before and after
contamination. Interferometry data including radius of curvature,apex offset and fiber undercut are also recorded for each
test and reference connector. The changes of insertion loss and return loss as a function of distance of the closest particle
from the core are investigated. Results of mathematical modeling of contaminated fibers are correlated with experimental
data. The results show that contamination particles can prevent direct physical contact creating an air gap between two endfaces.
The area encompassed by a 25 µm diameter from the core is identified as critical. Particles located in this area,even if not
directly on the core,result in an increase in insertion loss (a delta of 0.5 to 1.8 dB) and an increase in reflectance (a delta of
10 to 44 dB). Dust particles of 1-25 µm result in an air gap of up to 200 nm.
The NEMI team is collaborating with the International Electrotechnical Committee (IEC),Telecommunications Industry
Association (TIA) and IPC (Optoelectronic Assembly and Packaging Technology). Specifications will be jointly submitted to
IEC SC86B Working Group 6 (interconnecting devices) for incorporation with IEC 61300-3-35,and to IPC as a draft of the
IPC-8497-01 standard. In addition,the project will collaborate with TIA and IPC on the development of cleaning methods
and contamination assessment for multi-level optical assemblies.

The concept revealed is a simple architecture for an optical printed circuit board,which permits manufacturing with the
materials normally used in printed circuit board fabrication. This concept is that the very short distances of Z travel within a
printed circuit board can be best traveled electrically,allowing the surface devices and general layout to be nearly standard
and with inexpensive devices. The internal transmission of optical signals is done only within a plane,making the
manufacturing much easier and the reliability as good as other embedded device PCBs. This should enable a much less
expensive optical PCB.

In order to cope with a rapid increase in information processing speed,additional technical developments of an
optical-electrical composite board are required. Generally speaking,it is more difficult to interconnect between optical
devises and optical lines than between electrical devises and electrical lines,and this fact is one of the reasons why it is big
challenges to put these boards to practical use. In this paper,we have investigated on this problem using an Optical Wiring
Board (OWB) prototype with embedded micro-mirrors. The OWB prototype is consisted of polymeric multimode optical
waveguides layer in conventional PWB and micro-mirrors that is embedded at the both ends of the optical waveguides. The
height of the mirrors is the same as that of optical waveguides,and optical signal pass between optical waveguides and the
board surface vertically through an upper cladding layer. We first calculated coupling efficiency of mirror by ray tracing
method,and we found that mounting tolerance on optical misalignment for 1dB loss is plus or minus 10 microns. The
calculated results were also supported by measurement using OWB prototype. We concluded that the OWB with the
embedded micro-mirrors as the optical coupler is promising for a future practical application.

The number of PCB manufacturers in Europe declined from 700 in the nineties to 400 early this decade and is forecasted to shrink to the range of 100 by 2010. A share of these companies will not survive the coming years; while the majority are
financially under heavy pressure do to global pricing and off shoring activities of their customers. A number of companies,large ones,medium size and small ones have found their way to be very successful in this environment. What are business models and secrets of these successors?

The dramatic economic downturn of the PWB industry starting in the forth quarter of 2000,which resulted in a reduction of 1/3 of the demand and corresponding supply chain within one year,has changed our industry fundamentally. There is now a
slow recovery,however,it does not take place worldwide but is concentrated in low cost regions. Many of the established PWB companies in the Western World are confronted with the question: "Is there a business model enabling a Western
company to survive and be successful again?"
AT&S,almost bankrupt at the beginning of the nineties,was given a new direction by the new owners and management with the MBO in 1994. This direction consisted mainly of changing from a low price supplier dependent on one big customer to a
competent partner for locally and globally acting companies. We followed a total cost approach according to the principal "Who can afford to buy cheap?" or "Paying a higher price for a product is often the less expensive solution,no matter
whether it is a component or a finished product".
Essential for this business model is to find the right balance between the factors: quality,technology,supply chain,optimization of customer solution,responsiveness and proximity to customers. The intent is not to focus on one of them following just a temporary trend. These items are decisive for building up customer confidence and trust to become a partner of competence. Their right balance leads to a total cost approach with the aim to offer the customers the best solution for their
final products in order to enable them to meet competitive price levels for their own products.

When using standard approaches to PCB design and manufacture,there are a number of different elements that can impact
signal integrity at high data rates including: inconsistencies in dielectric properties,inconsistencies in trace width,variation in
circuit spacing,uneven copper thickness and/or adhesion treatments. All these attributes reduce the signal integrity engineer's
ability to predict and design for maximum performance. When tied to the range of electrical concerns such as resistance,
dielectric loss,conductor loss,stray capacitance elements,signal skew and inductance which can lead to cross talk and
potential reflections due to electronic stubs from circuit features such as vias,one quickly sees a compounding of the
problem. It becomes evident that new approaches to solving these problems are required. While improvements in materials
and manufacturing processes have yielded some improvements,signal integrity experts still warn of the future impact of the
limiting elements of current approaches to printed circuit design and manufacture. Thus it becomes clear that a new and
better way of addressing these problems is to simply avoid the traditional design approach path in favor of new design
methods that break the manufacturing challenge into more manageable pieces.
This paper will examine and describe such methods incorporating fundamental approaches,which three-dimensionally
partitions printed circuit design and in the process segregates high speed signals from lower speed signals and power and
ground connections. Novel methods and structures that accomplish this objective illustrate how high speed signals are
interconnected by means of controlled impedance links that are fabricated separately from the PCB and later interconnected
directly between IC packages where required. Thus instead of trying to precisely control a complex printed circuit design into
a monolithic interconnect the signals are instead segregated and critical signals are shepherded to a more easily controlled
interconnection paths that lead directly from chip-to-chip or chip to other suitable electronic device.

The IPC study mentioned in the title looked at the effects of time,temperature and humidity on the solderability of true bare copper,immersion silver,immersion tin,organic soldering preservative,reflowed tin/lead and immersion gold/electroless nickel circuit board finishes. In the study solderability was measured by the traditional,qualitative dip and look test; by wetting balance and by SERA. This present examination centers on the results of the wetting balance and SERA work. Data for time to zero,time to two thirds maximum wetting force,maximum wetting force and the SERA parameters V2 and Vf were all examined in an attempt to see which are related. Some correlations were found that may be useful.

The deployment of non-Lead (Pb) surface finishes is well underway throughout the electronics industry. Printed circuit boards,which for many years had relied on Hot Air Solder Level (HASL) finishing,have been using new flatter,Pb-free solderable finishes. Market tracking surveys indicate that the use of HASL has dropped below 50% of all PCB’s. HASL alternative finishes include Organic Solderability Preservative (OSP,) Electroless Nickel Immersion Gold (ENIG,) Immersion Silver,and Immersion Tin. While there are significant differences among the HASL alternative coatings,they do have certain characteristics in common. All HASL alternatives are much flatter and thinner coatings than HASL.
PCB surface finishes need to perform several functions. Archived literature provides information on the solderability,contact functionality,solderjoint reliability,and high speed signal integrity effects of the surface finish options. The summary contained herein describes a fundamental criterion of all board finishes: the ability to protect copper for subsequent soldering and field use. The surface finish,and therefore the underlying copper,can be compromised by exposure to harsh environments such as air pollution,condensing moisture,ionic liquid solutions,and contact with corroding materials. Surface finishes are more or less degraded based on the sensitivity of the surface finish to environmental contaminants and the thickness of the protective coating. For example,tin/lead is not especially resistant to corrosion,but it does have the advantage that it is deposited to such a thickness that it withstands corrosion relatively well.
Corrosion of copper circuitry begins as thin tarnish of the surface finish. Circuit functionality will be compromised only if the chemical pollutants,and the means to convey the pollutant,are present long enough to corrode the copper. This paper reviews some specific causes of corrosion,methods used to measure the corrosion,functional aspects of tarnish and corrosion,and methods employed to prevent surface corrosion. Of special interest,this paper reviews the use of ultrathin layer of tarnish protection on new HASL alternatives such as immersion silver. More specifically,the topic of creeping corrosion will be discussed as an example of the extreme results of tarnish and copper migration.