The lead-free directive from the EU has created a number of challenges for high reliability electronic applications. Key among those challenges is the need to address the issue of tin whiskers. While complete elimination of the tin whisker phenomenon on tin finished materials is not possible there are steps that can be taken to manage and mitigate the creation and effect of tin whiskers. Delphi has focused on mitigation steps to reduce the likelihood of tin whisker occurrence and has implemented processing measures to reduce the potential for damage by tin whisker that do occur. Those mitigation steps and findings from validation work and product performance reviews are shared.

•Board-level drop shock test was performed on 9 assemblies
–63 parts / board
–Parts representative of military package styles
•Assembled on Pb-free compatible laminate with SAC 305 solder
•Selection of the non-BGA parts reworked with SnPb solder
•Metallurgical characterization
•Assemblies fixtured to drop table and subjected to 500Gs for a total of 20 drops
•In-situ shock response,net resistance and strain recorded
•Physical FA performed to characterize mechanical damage

- Background: What is a void?
- What is a "macro" void?
- What is a “planar” void?
- What is a “shrinkage” void?
- What is a “microvia” void?
- What is a “pinhole” void?
- What is a “Kirkendall” void?
- Macro voids: Good or Bad?
- Is it possible to make voids on demand?
- Let’s Make a Void (or Not) 5 Years Later

The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies,generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA),Chip-Scale Package (CSP),or even a Package-On-Package (PoP) and is characterized as a process anomaly,where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section,it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources,such as solder ball oxidation,an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply,process & material) of the head-in-pillow defects.
It will thoroughly review these three issues and how they relate to result in head-in-pillow defects. In addition,a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.

Eagle Test Systems (ETS) a Teradyne Company established a team during 2009 to develop a training exercise that would bring High Density Interconnect (HDI) knowledge to new products. A digital module was chosen as a redesign candidate to convert from standard printed circuit board technology to HDI with the help of an experienced third party CAD design house (DDI). The goal of the project was to take the existing digital module and reduce its mechanical size and features by approximately 50%; while maintaining or improving its electrical characteristics. One successful prototype lot was designed,fabricated,assembled,tested,and compared to the existing product performance. The design and fabrication process utilized while performing these tasks was documented and used to train ETS CAD designers,product development,manufacturing,and test engineers on HDI technologies.

Entrapped moisture within printed boards can expand during soldering operations,causing delamination or other damage. Available methods for determining moisture content may be destructive
or non-destructive,and vary considerably in accuracy,equipment cost,and ease of use. This study assesses the methodology in the new test method IPC-TM-650 Method 2.6.28,and its applicability to
the recently published IPC-1601 "Printed Board Handling and Storage Guidelines." Moisture content was measured on samples of printed boards from various manufacturers,with differing laminate materials,constructions,and board thicknesses. Limitations and advantages of this test method are presented.

Sculpted Flex Circuits are a very cost effective,low profile termination solution that is not very well known. These Flex Circuit hybrids can provide the user a simple interconnection between circuit boards or a circuit boards and anything else,which does not require connectors. This eliminates the need for the space taken up on a circuit board by traditional connectors. Sculpted Flex Circuits can carry high current/voltage and can be shielded for signal integrity. And they can easily be fabricated from commercially available materials,with standard PWB processes and be certified to common DOD and industry specifications. This presentation will define the Sculpted Flex Circuit,explain the fabrication techniques and explore common applications. The most interested audience will be the designers,technicians,engineers and systems people at the EMS to OEM level.

Backward Compatibility of Pb free SnAgCu (SAC) solders with conventional SnPb soldering has been a subject of considerable interest since the introduction of Pb free solders earlier in this decade. Most BGA package suppliers have converted their BGAs ball alloys to Pb free,using SAC solder. Some customers for these BGA packages,whose products have exemptions from the use of Pb free solders,are still employing SnPb solder paste for reflow soldering their products. The two main concerns with Backward Compatibility are the quality and reliability of the solder joints formed when mixing SAC solder balls of the BGA with eutectic SnPb solder paste. Acceptable mixing of the two alloys is critical for solder joint yields during high volume manufacturing,as well as for long-term solder joint reliability in the field.
One key challenge to maximizing both the solder joint yield and reliability has been to achieve adequate collapse of the SAC solder balls and sufficient Pb mixing when the reflow soldering process is performed at temperatures below the Pb free solder liquidus temperature. Backward Compatible reflow profile development has always been a challenge,but recently,this challenge has been further exacerbated by the increase in size and complexity of high density BGAs.
This paper will illustrate the challenges encountered in reflow profiling of a thick (>90mils),printed circuit board test vehicle,which contains four each of two large (>37mm,>1200 balls),high density BGAs. The ball collapse and the percentage of Pb mixing achieved in the solder joints of these BGAs during the various iterations of the reflow profile development will be presented. The impact of package dynamic warpage during the reflow soldering process,on the solder joint shape,collapse and percentage of Pb mixed within a solder joint will also be described As part of the study,recommendations will be made for an optimum reflow window that can be used to achieve acceptable degree of mixing in
solder joint formation.

Pad cratering in Printed Circuit Boards (PCBs) is typically associated with lead-free products. This paper addresses laminate materials and the failures associated with the higher Pb-Free reflow temperatures and the acceptability requirements for use in Pb-Free products. The use of testing methodology,including pad pull testing and IPC peel testing to rank materials and processes is investigated,with a general relationship between pad size and strength being offered. Two cases studies illustrate the value in pad pull testing.

Recently,the industry has seen the development of a wide range of new Pb-free alloys. A significant element of uncertainty within the industry regarding these new alloys is the lack of defined data requirements for alloy acceptance.
This paper describes the progress of recent efforts to standardize Pb-free solder alloy testing requirements. Hewlett-Packard,the iNEMI consortium,the Solder Products Value Council,and the IPC are working together to create such standards. To facilitate the standardization of alloy testing,the required tests are divided into three major areas,each of which may be covered by a separate standard.
• Material properties
• Solder joint reliability
• Impact to manufacturing processes
This paper presents the status of standardization efforts in each of these three areas.