High levels of residual moisture in PCBs are problematic and can result in delamination during soldering and rework. Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work,focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes,with capacitance sensors located on the inner layers. For trapped volumes between copper planes,the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs,the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed,that in certain circumstances,regions of the PCB under copper planes initially increase in moisture during baking.

As part of High Density Packaging Users Group (HDPUG) Pb-Free Board Materials Reliability Project 2,the moisture sensitivity of various lead-free laminates and the effect of moisture uptake on the material survivability through Pb-free reflow were studied using capacitance measurements and time-domain reflectometry (TDR) impedance measurements. WIC-20 coupons were used as test vehicles. In this paper,results from 20 different laminate materials will be summarized. The relationship between moisture uptake and material survivability through Pb-free reflow will be discussed.

Moisture can accelerate various failure mechanisms in printed circuit board assemblies. Moisture can be initially present in the epoxy glass prepreg,absorbed during the wet processes in printed circuit board manufacturing,or diffuse into the printed circuit board during storage. Moisture can reside in the resin,resin/glass interfaces,and micro-cracks or voids due to defects. Higher reflow temperatures associated with lead-free processing increase the vapor pressure,which can lead to higher amounts of moisture uptake compared to eutectic tin-lead reflow processes. In addition to cohesive or adhesive failures within the printed circuit board that lead to cracking and delamination,moisture can also lead to the creation of low impedance paths due to metal migration,interfacial degradation resulting in conductive filament formation,and changes in dimensional stability. Studies have shown that moisture can also reduce the glass-transition temperature and increase the dielectric constant,leading to a reduction in circuit switching speeds and an increase in propagation delay times. This paper provides an overview of printed circuit board fabrication,followed by a brief discussion of moisture diffusion processes,governing models,and dependent variables. We then present guidelines for printed circuit board handling and storage during various stages of production and fabrication so as to mitigate moisture-induced failures.

#NAME?

Several methods exist to determine cleanliness of printed wiring assemblies. This presentation will describe the common methods used for determining cleanliness of printed wiring assemblies. The test methods used for extraction techniques such as resistivity of solvent extract and ion chromatography will be identified and results from actual tests will be analyzed. Electrochemical methods will be presented including electro migration and surface insulation resistance methods. Results from actual testing will be reviewed and interpreted from a user’s perspective. From the interpretation of the results of testing,potential sources of contamination will be identified. The detection of certain types of residues including ionic and non-ionic contaminates which are commonly found as a result of electronics assembly process. Sources of common contaminates such as: residual plating chemistry,flux residues,surfactants,oils.

As people become more concerned about the global outbreaks of various strains of influenza,more precautions are being taken with respect to personal hygiene. A common precaution involves the use of hand sanitizer solutions or similar germicidal agents. For manufacturers of electronic assemblies,this may mean a potential transfer of these solutions/agents to the surface of the assemblies as a contaminant material. Similarly,many production employees in the electronics industry deal with harsh chemicals,which often remove hand oils,resulting in chapped or dry skin. The use of hand lotions may or may not be allowed,depending on the manufacturer,with a similar concern regarding transfer of unknown chemicals to the assembly surface. This paper is an examination of some typical hand sanitizers and hand lotions and their impact on high reliability electronic hardware.

The growing complexity of electronic assemblies increases the cleaning challenge due to miniaturization,lower component gaps,and improved flux designs. The need to remove ionizable contaminants is critical to production yields and reliability. As user’s source cleaning equipment and cleaning agents to meet these increased cleaning demands,a number of options must be considered such as batch versus inline,cleaning agent designs,impingement options,controlling the cleaning agent,rinsing,drying,and waste management. The purpose of the research paper is to provide operational data for integrating aqueous cleaning equipment and cleaning agent for maximum performance. The conference participates will gain knowledge of batch and inline aqueous cleaning equipment designs,cleaning agents,energy sources for penetrating low residue gaps,air management,controlling the cleaning agent,managing rinse water,and waste management.

Advancing technology frequently requires an accompanying advancement in materials technology. Recently,these advances are also driven by changes in environmental legislation as well. Specifically,the RoHS legislation has mandated a move away from lower-temperature Sn/Pb solders to higher reflow temperature SAC alloys on the PCB assembly. This change in reflow temperature drives changes to materials used inside packages as well. In addition to material composition changes,component geometry,spacing,and design drive new process capability. In this paper we will discuss the testing
and evaluation of a new die attach solder paste material,the design considerations for both process and alloys. We will discuss the requirements for these materials used in high power packages and the material properties needed to deliver on these requirements.

As margins on electronics technology have continued to erode,an increasing number of organizations have implemented design for reliability practices to ensure device performance while meeting tight product development guidelines. There are numerous aspects of DfR principles,including specification development,part selection and derating,design review by failure mod (DRBFM),and physics of failure (Pof). Often overlooked by the "science of success," Pof will play a crucial role in future design activities as an increasing number of technologies are designed with limited lifetimes. Components of concern have broadened from the traditional LEDs and electrolytic capacitors into sub-90nm integrated circuits and solder joint fatigue. This presentation will provide a history and overview of PoF and where it fits into the overall scheme of DfR. Of critical importance will be a discussion on which organizations and standards bodies will start to require PoF and how to implement PoF into your design activities to ensure product success and compliance with the next generation of industry specifications.

High reliability applications in the military and aerospace industry require reliable solder finish
identification on components within the supply system of DoD,NASA,and many other organizations. Consumer products and military/aerospace industry commonly share the same suppliers of electronic components. The RoHS regulation has forced those suppliers to provide lead free solder solutions. As a result,components with many different solder finishes are now available. Compatibility issues,among
those various solder finishes such as melting temperatures,tin whisker formation,stress fracturing etc. create a serious reliability problem the military/aerospace industry is trying to overcome. A new technique has been developed to reliably identify unknown samples or materials utilizing XRF instrumentation. The technique will help in identifying quickly and reliably bulk and surface finish solders of individual components as well as populated boards. This new identification tool can be used for any application and is particularly helpful if suitable standards are unavailable. Fischer Technology will present practical examples for solder analyses. The method will also assist the user to identify the correct measurement application which can then be used to make a full quantitative analysis if desired.