Since the implementation of the European Union RoHS directive in 2006,the electronics industry has seen an expansion of available low-silver lead (Pb)-free alloys for wave soldering,miniwave rework,BGA and CSP solder balls,and,more recently,solder pastes for mass reflow. The risks associated with the higher processing temperatures of these low-silver (Ag between 0-3 wt%) solder alloys,such as potential laminate or component damage,increased copper dissolution,and reduced thermal process windows may present manufacturing challenges and possible field reliability risks for original equipment manufacturers (OEMs). In order to take advantage of potential cost reduction opportunities afforded by these new alloys,while mitigating manufacturing and reliability risks,the company has defined test protocols [1-4] that can be used for assessing new Sn-Ag-Cu (SAC),Sn-Ag,and Sn-Cu alloys for general use in electronics. This paper describes initial test results for low-silver alloys using these solder paste alloy assessment protocols for BGAs and leaded components,and the impact of the alloys on printed circuit assembly process windows. Specific pass/fail criteria for acceptance of an alloy are not included,however,as they may vary across industry segments. The assessment evaluates wetting behavior,solder joint thermal fatigue and mechanical shock reliability,intermetallic formation,general physical joint acceptability,and copper dissolution. The variables include multiple component types: two BGA components with the same paste/ball alloy combinations,and numerous leaded components that include common component platings. Surface mount (SMT) process temperature windows are typically constrained on the low end by the ability to melt solder and form acceptable joints,and on the high end by the maximum process temperatures of other materials,such as components. These two constraints have led to a process window of approximately 25°C when soldering with more conventional,Sn-3.0Ag-0.5 Cu paste. Low-silver SMT alloys have been found to reduce the thermal process window even further.

Interconnects between layers of circuitry in multilayer printed circuit boards are produced by drilling and plating. Drilling quality can have a major impact on the longevity of the plated interconnect. Mechanical drilling is especially challenged when the printed circuit board panel is not perfectly flat. Many printed circuit boards (PCBs) contain components and features that create topography that is either expensive or impossible to level out during drilling and other manufacturing processes. A novel material and method have been developed,and benefits demonstrated,that is highly conformable providing a means to produce a level drilling surface without altering or negatively impacting the printed circuit board. In summary,this paper will present a new technology and process in mechanical drill backing material designed to be used in rigid multilayer,rigid-flex and flexible printed circuits. The features and benefits of the technology will be presented as well as examples showing method of use,a comparison to standard drilling methods and the resulting benefits of using this material.

What are the Raw Material Risks?
-Today PCB Suppliers handle a range of customers with different end use environments
-Telecommunications
-Automotive
-Consumer electronics
-Medical
-Industrial,others...
-PCB manufacturers' objective -- minimize variety of solder to as few as possible (not just soldermask,other materials as well)
-Unfortunately subsequent assembly steps such as finishes,fluxes,solder materials are often overlooked
-New class of solder mask defects are influencing the reliability of the finished end product
What is the Subsequent Process Risk?
-After solder mask application,PCBs are exposed to process steps:
-Surface finish
-Wave soldering and reflow processes
-Local/selective wave solder and rework applications
-Blowholes can act as acceptors and reservoirs
-Interaction of process chemicals

Today’s wide variety of laminate materials and specialized dielectric choices pose a challenge for process engineering. In particular,smooth surfaces,such as polyimide,flex circuit substrates and rigid-flex constructions with window cut-outs,can be a challenge for electroless copper and plating processes. Conventional electroless copper systems often required pre-treatments with hazardous chemicals or have a small process window to achieve a uniform coverage without blistering. To overcome the challenge of metallizing smooth surfaces,a new stress-free electroless copper was developed to serve this important sector of the printed circuit industry.

The rapid growth of electronic devices across the globe is driving manufacturers to enhance high-speed mass production techniques in the printed circuit board assembly arena. As manufacturers drive to reduce costs while maximizing production by expanding facilities,updating automation equipment,or implementing lean six sigma techniques,the potential to build scrap product or rework printed circuit boards increases dramatically. Manufacturers have two general paths to reduce the costs of high-speed printed circuit board assembly production. The first path is to reduce cost by focusing on high quality printing and mounting. The other,increasingly popular option is to utilize low-cost materials. In either case,the baseline must provide a consistent high-speed solder paste printing method,which considers the fill,snap-off,and cleaning processes. Building on our expertise and testing,this paper will highlight the two trains of thought with specific focus on how low-cost materials affect print performance. It will also explore technologies,which can help provide stable,high-speed screen-printing. In the end,both paths aim to maximize profitability. As such,understanding how manufacturers can successfully integrate low-cost materials will help ensure high-quality production,reduce costs,and maximize profitability in a high-volume printed circuit board assembly environment.

The SMT stencil is a key factor in the solder paste printing process. It has been shown repeatedly that print quality has the largest impact on end-of-line quality,and a good print process can make or break the profitability of building a PCB assembly. A good print process relies on a good stencil. Much research has been performed to identify individual key factors in stencil performance; this paper and presentation discuss the real-world application of numerous findings. They review the numerous considerations in design,material,manufacturing and coating considerations,and how to best choose them based on PCB layout.

Solder paste screen printing is known to be one of the most difficult processes to quality assure in Printed Board Assembly (PBA) manufacturing. An important process step in solder paste screenprinting is the under stencil cleaning process and one of the key materials in this process is the cleaning paper. This,often neglected,material affects the cleaning process and thereby also the print quality. It is therefore important to perform tests of different cleaning papers before one could be chosen. This article describes how cleaning papers can be tested and it also tells how big differences it can be between different materials.

Achieving optimum high-frequency printed-circuit-board (PCB) performance is not simply a matter of specifying the best possible PCB material,but can be significantly impacted by PCB fabrication practices. In addition to appropriate circuit materials and circuit design configurations to meet target performance goals,a number of PCB material-related issues can affect final performance,including the use of solder mask,the PCB copper plating thickness,the conductor trapezoidal effect,and plating finish; understanding the effects of these material issues can help when fabricating high-frequency circuits for the best possible electrical performance.

Today's Electronic Industry is changing at a high pace. The root causes are manifold. So world population is growing up to eight billions and gives new challenges in terms of urbanization,mobility and connectivity. Consequently,there will raise up a lot of new business models for the electronic industry. Connectivity will take a large influence on our lives. Concepts like Industry 4.0,internet of things,M2M communication,smart homes or communication in or to cars are growing up. All these applications are based on the same demanding requirement – a high amount of data and increased data transfer rate. These arguments bring up large challenges to the Printed Circuit Board (PCB) design and manufacturing. This paper investigates the impact of different PCB manufacturing technologies and their relation to their high frequency behavior. In the course of the paper a brief overview of PCB manufacturing capabilities is be presented. Moreover,signal losses in terms of frequency,design,manufacturing processes,and substrate materials are investigated. The aim of this paper is,to develop a concept to use materials in combination with optimized PCB manufacturing processes,which allows a significant reduction of losses and increased signal quality. First analysis demonstrate,that for increased signal frequency,demanded by growing data transfer rate,the capabilities to manufacture high frequency PCBs become a key factor in terms of losses. Base materials with particularly high speed properties like very low dielectric constants are used for efficient design of high speed data link lines. Furthermore,copper foils with very low treatment are to be used to minimize loss caused by the skin effect. In addition to the materials composition,the design of high speed circuits is optimized with the help of comprehensive simulations studies. The work on this paper focuses on requirements and main questions arising during the PCB manufacturing process in order to improve the system in terms of losses. For that matter,there are several approaches that can be used. For example,the optimization of the structuring process,the use of efficient interconnection capabilities,and dedicated surface finishing can be used to reduce losses and preserve signal integrity. In this study,a comparison of different PCB manufacturing processes by using measurement results of demonstrators that imitate real PCB applications will be discussed. Special attention has be drawn to the manufacturing capabilities which are optimized for high frequency requirements and focused to avoid signal loss. Different line structures like microstrip lines,coplanar waveguides,and surface integrated waveguides are used for this assessment. This research was carried out by Austria Technologie & Systemtechnik AG (AT&S AG),in cooperation with Vienna University of Technology,Institute of Electrodynamics,Microwave and Circuit Engineering.

The High Density Packaging (HDP) user group has completed a project to evaluate the majority of viable Dk (Dielectric Constant)/Df (Dissipation Factor) and delay/loss electrical test methods,with a focus on the methods used for speeds above 2 GHz. A comparison of test methods from 1 to 2 GHz through to higher test frequencies was desired,testing a variety of laminate materials (standard volume production with UL approval,low loss,and "halogen-free" laminate materials). Variations in the test board material resin content/construction and copper foil surface roughness/type were minimized. Problems with Dk/Df and loss test methods and discrepancies in results are identified,as well as possible correlations or relationships among these higher speed test methods.