This paper compares performance of two phosphorus-based flame retardants: poly-(m-phenylene methyl phosphonate) (PPMP) recently introduced to the market and 9,10-dihydro-9-oxa-10-phosphenanthrene-10-oxide (DOPO) the basis of many commercial halogen-free laminates.
Although DOPO is a reactive flame retardant,it is monofunctional and it can be used only with multifunctional epoxy resins. PPMP on the other hand,is a very effective cross-linker and performs as a curing agent. Comparative study with 5 types of epoxy resins and 4 types of co-curing agents showed that both DOPO and PPMP have very high flame retardant efficiency giving V-0 rating at as low as 1 wt. % phosphorus in the formulation. Electrical properties of DOPO and PPMP based laminates are similar. Epoxy resins cured with PPMP show very high Tg which may satisfy FR-5 type laminates. Slightly higher water absorption of PPMP based laminates can be overcome by appropriate curing and better incorporation of phosphorus in the epoxy network.
In the current printed wiring board (PWB) technology where flame retardancy is required tetrabromobisphenol A (TBBA) is the product of choice. Industry has been using TBBA for over thirty years and the product performed well. Currently TBBA is undergoing risk assessment in Europe under new REACH legislation. Human health part of the risk assessment has been completed,but at the time of preparation of this paper environmental part of the risk assessment has not been completed yet because additional studies had been commissioned to address the potential degradation of TBBA and the potential risk to sediment and soil. Not waiting for the outcome of risk assessment,many OEMs announced halogen-free policies if technically feasible alternative to TBBA is identified.

Printed circuit board (PCB) feature sizes are decreasing to support increasing density thrusts for electronic products and packaging. The transition to lead-free products has changed the stress conditions that are generated at the second level
interconnects as a result of “stiffer” lead-free solder joints and greater CTE mismatches between the components and the PCB as a result of the higher assembly temperatures. New laminate materials have been introduced to survive the higher lead-free assembly temperatures. The confluence of all these factors has shifted the primary failure mode in mechanical shock testing for BGA joints from solder fractures in tin lead soldered product to laminate fractures of the metal defined PCB pads (or what Intel calls “Pad Cratering”) for lead-free product.
This paper will review the fundamental drivers that have increased the risk of “Pad Cratering” with the transition to lead-free assembly. In it we will examine and compare the thermal and mechanical material property differences between standard and high Tg FR4 laminate materials after boards are subjected to lead free assembly conditioning. The thermal and mechanical properties will also be compared against the relative “pad crater” response for the test vehicles used in the experiments. This paper will review the metrology methods employed to determine the differences and quantify the results. The paper will also
review the effect of tested design changes on “pad cratering” response. The ultimate goal of the project is to identify key thermal/ mechanical laminate properties and metrologies which can define limits and quantify a product’s susceptibility to “pad cratering”. Additionally,we will examine the sources and extent of variation in the properties for the purposes of providing modeling inputs for the development of predictive mechanical models for “pad cratering”. This paper is a first step in the development process.

The delamination of electrical grade laminates continues to be a vexing problem for the printed circuit board industry. Laminates are commonly tailored to meet specific thickness and dielectric requirements. This will typically involve
modification of the laminate thickness and resin content,leading to the inevitable creation of weak areas within the construction. The current industry standard for delamination testing for electrical laminates requires examination of the
fracture mechanics over a mixture of mode I and mode II type behavior. The mixed mode bending leads to a good deal of ambiguity in the experimental results,complicating investigations to determine the root material properties responsible for delamination failures. To elucidate the true sources of composite delaminations,it is important to begin with an appropriate testing approach. In this paper,we examine several current and experimental delamination test methods. Methods examined include testing in pure mode I,in pure mode II,and in mixed mode I/II. Testing is performed on polymer matrix,e-glass reinforced electrical grade laminates at 23°C. From the analysis,a dedicated testing procedure is presented with the goal of more accurately predicting what values indicate a greater probability of short-term laminate failure. Based on the results,with use of laminated composite fracture mechanics,board constructions and processing conditions can be tailored to limit conditions that place unwarranted stresses on the system,thereby increasing overall laminate performance.

The regulatory measures defined in MIL performance standards that govern production of active and passive electronic components ban the application of pure Sn plated leads for EEE parts. The standards imply that the top coating of the
component leads can contain a maximum of 97% of Tin and a minimum of 3% of Lead as an alloying element. The alloying element reduces the internal stresses present in the pure Tin electroplated coatings and diminishes one of the known causes for whisker growth. However,there are still EEE components on the market that are produced with pure Tin coating on the leads. Some of these components represent an intrinsic part of the successful final product with no viable substitutes.
Experience gained in processing the components,in order to make them flight worthy,highly reliable and whisker free,is used in facilitating a transition from Lead solder to Lead free PCA manufacturing. As a result,a positive trend of removing Lead from the first and second level of electronic interconnects is adopted regardless of the currently applicable exemptions for space industry.
This paper presents experimental data collected on pure Tin plated parts and whiskers grown in the period 1991 –2001 on EEE parts; test results confirming material condition producing whiskers growth trends,dimensional analysis and related processing steps used for annulling generation of whiskers are also performed. The successful processing of the related component,and reported experimental data established grounds for challenging the NASA STD 8739.3 statement on limitations of the minimal spacing from the component body for soldering of leads.
Furthermore,the analysis and qualification test results of the particular non SAC solder considered as a potential replacement of Lead containing solders for space application is elaborated for standard electronic assemblies configurations and thermal regimes. A new prospective,affirmed by qualification test data of using this solder for harness interconnects at cryogenic temperature environment also presented.

On July 1,2006,lead and certain other hazardous materials were banned from most forms of new electronic equipment in the countries of the European Union. Although most aerospace products are not directly subject to these restrictions,we are being forced to consider the use of lead-free materials and assembly processes that electronic part and assembly manufacturers implement for their non-aerospace target markets. This transition is disruptive to the aerospace industry,which must accommodate decisions made by others,while continuing to assure that aerospace products are reliable,repairable,certifiable,airworthy,supportable,affordable,and safe.
To be cost and performance effective,common solutions must be developed and accepted by commercial,military,and space avionics original equipment manufacturers (OEMs),platform integrators,operators,and regulatory agencies. The Aerospace Industries Association (AIA),Government Engineering and Information Technology Association (GEIA),and Avionics Maintenance Conference (AMC) has formed the Lead-free Electronics in Aerospace Project Working Group (LEAP WG) to enable the aerospace industry to accommodate lead-free electronics,provide common standards,and facilitate communications within the aerospace industry and with other industries. Its deliverables include a standard for defining top level requirements,a standard for delineating the detrimental effects of tin whiskers,and a handbook for assisting program and system engineering management in the transition. Four additional documents are also in work,covering reliability test protocols,technical guidelines for various aspects of the transition,reliability analyses/modeling,and rework/repair and
maintenance.
The LEAP WG cooperates with other aerospace organizations to assure participation in this work and implementation of its results across the entire aerospace industry. This paper reports on the status of the work,with an emphasis on the program manager’s handbook and an invitation for participation by all interested parties.

The debate on the effect of voiding on BGA reliability has continued for years. Many PWB assemblers strive to minimize voiding,particularly with the advent of lead-free processing and in fine feature area array devices. Although solder pastes
have been designed to minimize voiding and processing guidelines exist to mitigate void formation during reflow processing,the presence of a microvia in a PWB pad can contribute significantly to void formation. It is believed that the depression in the pad caused by the microvia traps air during the stencil printing process,and the air cannot fully escape during reflow.
A process of filling the vias with copper at the board fabrication phase,thereby eliminating the depression that contributes to voids,was tested for its effectiveness in void mitigation during assembly. The test compares the voiding results of filled vias with those of unfilled vias and flat pads with no vias at all. The test vehicle and methods,as well as the results of the tests are presented and discussed in detail.

The pressure to reduce overall form-factor size in the high volume chassis desktop market is driving the need to integrate components at the system level. Adding to the challenge of size reduction are pressures from increasingly shock sensitive active components,heavier heatsinks,lower cost targets,and decreased time to market. Integrating the system design was the logical step necessary to meet these challenges. However,with integration come complexities and dependencies that are difficult to optimally design,test,and troubleshoot. To evaluate these integrated chassis,classic engineering methods have been set aside in favor of newer innovative methods that can comprehend interdependent mechanisms. This paper will discuss overall system level design parameters that impact solder joint reliability performance and review the methods used to evaluate them.

Research has shown that U.S. companies can realize higher profits over outsourcing by putting their houses in order and finetuning their production processes,with automation being a key contributing factor. Machine capability analysis,or performance verification,is the first step to ascertaining that all of the automated equipment in the line,from printers to pick and place to reflow systems,are performing to specification.
This paper examines techniques and methodology used in Machine Capability Analysis (MCA) and equipment performance verification,using hardware and software quality tools,to analyze machine capability,checking the basic settings and functions of the equipment to identify,control,and correct failures,so that the unit(s) can once again assemble product within the original quality specifications established by its manufacturer.
The data and measurement results obtained provide the base for stable and controlled processing. Statistical specificationbased results help validate accuracy and repeatability performance,which allows users to improve product quality and
optimize performance for increased manufacturing profitability.

In the global Electronic Manufacturing Services (EMS) market,we constantly hear news of the major ("Big 6") players—Foxconn,Flextronics,Sanmina-SCI,Solectron,Celestica,Jabil—as well as others. But what about the remainder of this
market? The portion served by those EMS companies with revenues less than $250 million totals $15 billion annually and is distributed among approximately 2,000 global service companies. What does the future hold for these smaller industry participants? Will they survive? Will they be gobbled up by the bigger fish? Can they compete in the mass migration of electronics manufacturing to low-cost regions? With these questions in mind,we chose to investigate this global market for smaller EMS providers.
We conducted analysis on this market and will present background,the outlook for the EMS industry,analysis of interviews with industry participants,and data to support the following conclusions:
? The global electronics COGS will continue to grow.
? Penetration of this market by EMS suppliers will continue to expand.
? There will continue to be a market place for the smaller EMS providers.
? Smaller companies demonstrated greater profitability metrics,while the larger contractors exhibited better cash
management performance.
? Smaller EMS contractors are well suited for the high-mix/low-volume production contracts entailing complex
technology,unpredictable fluctuating schedules,and numerous engineering changes.
? The industrial,medical,instrumentation,aerospace/defense,and high-end communications segments are typical of
these product characteristics.
? Flexibility,relationship management,and level of service are the major advantages of the smaller EMS companies
over their larger counterparts.
? Global supply chain management,the temptation to move to low-cost regions,price pressures,and adequate
financial resources are the major challenges facing today’s smaller EMS contractors.

The level of protection offered by a range of conformal coatings on electronic assemblies has been evaluated. The role of permeability and ion transport is the primary interest. Testing was carried out on 6 coatings of the main generic types
currently used by industry either conformally coated onto FR-4 laminate boards or,as free films. The coatings were evaluated in terms of the degradation caused by sodium chloride and a generic flux formulation based on dibasic acids. The
methods utilised were surface insulation resistance (SIR),sequential electrochemical reduction analysis (SERA),PermeGear diffusion cells and gas chromatography mass spectrometry (GC-MS). Conformally coated boards were used for the SIR and SERA measurements while free films of the selected coatings were used for the diffusion and GC-MS measurements.
Each method revealed aspects of the level of protection offered by the coatings as well as the extent to which the coatings are permeable to contaminants in high environmental stress regimes. The coatings acted as an effective barrier to NaCl penetration but were permeable to dibasic acids found in electronic fluxes. The importance of board cleanliness is also highlighted by the results obtained from these investigations.