A Comparative Study of PWB’s Containing Halogenated and Halogen Free Flame-Retardants

In order to evaluate the relative merits of halogenated and alternative flame-retardants used in PWB’s,a comparison
between several different PWB’s each having different flame-retardant packages has been made. The study examines
the leachability of each of the PWB’s,the products obtained from simulated combustion of each PWB,and factory
monitoring of a preferred halogen free PWB. For the combustion tests,incipient fires were simulated using
DIN53436 protocol and tests were carried out at 260ºC and 600ºC in an ISO/TR 9122 apparatus. Leaching studies
were performed using US EPA Method 1311 - TCLP (Toxicity Characteristic Leaching Procedure).

Author(s)
Steven Scheifers,Markus Stutz,Aroon Tungare,Michael Riess,Bill Kierl
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

Combination Grid – Prober Test

Combination grid-prober (CGP) testing is being
employed with increasing frequency as the density of
SMD lands on boards continues to increase. A
number of factors are at work. Grid testers,as a
stand-alone test methodology,provide a fast and
comprehensive test,but they require costly fixtures
and suffer from intermittent "false opens" when
testing very dense or fine pitch boards. Flying probe
testers,on the other hand,are exceptional in their
ability to handle density and fine pitch,but they
unfortunately suffer from long test times relative to
grids. The test time penalty is so severe,that in some
quick turn environments,fixture test is the preferred
methodology only because lead-time does not exist to
probe the boards. Since the total cost of test is lower
for flying probe than grids below quantities of about
500 boards,some board manufacturers are adding
flying probe capacity in much the same way that
multiple drill machines together provide the capacity
to meet production volume. While this solution may
be satisfactory for some,it is cause to reassess
combination grid and prober testing as a better use of
capital.

Author(s)
Duane Delfosse
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

Characterization of Environment-Friendly Halogen-Free Materials for radio Frequency Electronics Use

Increasing global interest in environmental protection is leading to a higher demand for halogen-free materials that can be
used as the base materials for the printed wiring boards (PWBs) in electronic equipment. These halogen compounds are
under increased legislative scrutiny in Europe as these compounds have been found to form dioxins and furan trace levels
upon incineration. Hitachi Chemical Co.,Ltd. developed halogen-free materials (laminate,prepreg and build-up materials)
for multi-layer boards. Major Japanese OEMs are removing halogen compounds from products and making them
environmentally friendly. The resultant materials satisfy the UL 94V-0 standard without using any halogenated compounds.
Motorola along with Hitachi Chemical developed a strategy to implement the environmentally preferred technologies into
various products based on Market and Competition. In an effort to identify laminate materials,which are acceptable for high
frequency,high performance electrical applications,the characteristics of Bromine,free material was benchmarked with
commercial FR-4 material.
Regarding the flame-retardants other than the halogenated compounds,nitrogen compounds,phosphorus compounds or
inorganic filler are generally known. To achieve UL 94V-0,we need to add a substantial amount of these flame-retardants.
However,these materials influence the properties of PWBs: heat resistance and the pollution rate of medical liquids used in
the production process of the PWBs.
The Japanese resin/laminate supplier has achieved the flammability level (UL 94V-0) by developing an aromatic resinmodified
epoxy,herein termed BE resin. Because this BE resin has an extremely low rate of flammability,due to its aromatic
and nitrogen rich molecule structure,we could reduce the quantity of other flame-retardants.
These halogen-free materials also have good heat resistance,high elastic modulus at high temperature and low coefficient of
thermal expansion. They are able to meet the requirements of PWB manufacturing processes at a higher temperature in
soldering process using a lead-free solder and the highly reliable use of the resin to a thinner and higher-density PWB. Based
on dielectric constant,loss tangent,copper peel strength,glass transition temperature,Z-CTE,ease of processing and plated
through-hole reliability,these materials were assessed in a high performance circuit.

Author(s)
Terry Fischer,Yoshiyuki Takeda,Nitin Desai,James Zollo
Resource Type
Technical Paper
Event
IPC APEX 2003

CAM Automation: Solution to the Need for Speed and Accuracy

In the best selling book “Who Moved My Cheese”,
author Spencer Johnson tells the story of four
characters—mice named Sniff,Scurry,Hem and
Haw--who are in search of cheese within a maze.
Once they find it,they happily stay put. But one day
the cheese is mysteriously gone. Each character
reveals a different way of handling change when their
cheese has been moved. The story is not unlike the
perils of the circuit board industry. Many changes are
occurring that require circuit manufacturers to find
New Cheese. This paper will reveal how CAM
automation (one flavor of New Cheese) provides the
speed and accuracy needed to survive and compete in
this world of change.

Author(s)
David R. Roesler
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

CAF Resistant,Reinforced Microvia Dielectrics

This paper discusses the results of Conductive Anodic Filament (CAF) testing of three types of reinforced microvia
dielectrics using a CAF test specific Printed Circuit Board (PCB). Quantitative results are presented for two CAF
testing modes of failure for microvia layers: HDI layer-to-HDI layer and microvia hole-wall-to-microvia hole-wall.
Some additional data was also collected for the core material conductor-to-hole-wall configuration. The study
demonstrated that a glass-reinforced prepreg and two types of micro-reinforced prepregs,all used in microvia
construction,pass CAF testing. Additional significant factors relating to microvia PCB fabrication and reliability are
presented as they relate to decisions regarding use of CAF resistant materials.
Materials used in PCB fabrication,particularly those containing glass fibers (but not necessarily limited to them),
are susceptible to CAF growth. This growth,if it occurs,will lead to field failures. Often,these field failures are
"self-healing" and the root cause of the failure is not detected. The condition then reoccurs when product is placed
back in service. Other times,the failure is a hard fault and will result in a detectable short circuit. The occurrence of
CAF failures is not just limited to environmental factors; material selection,application,fabrication processes,and
design considerations also impact the growth of,or potential growth of,conductive filaments.
There is much work in the industry to develop and test CAF resistant dielectric materials. As many PCBs are
moving to microvia technology in order to minimize PCB size and maximize PCB function (electrical and design
density),additional factors must be considered when incorporating CAF resistant microvia dielectrics. In particular,
the ability to manufacture high quality and low cost (low material cost and PCB process costs) microvia layers is
equally important to passing CAF. Non-reinforced dielectrics have been shown to be CAF resistant but they can
result in failures from other environmental conditions such as thermal or mechanical stress. Because of these stress
related failures,the industry is moving to the use of reinforced microvia dielectrics as the solution. There are three
classes of reinforced microvia dielectrics: glass fabric,random chopped fiber (e.g. aramid or LCP),and microreinforced
(e.g. expanded PTFE). This paper focuses on two types of dielectric reinforcements: glass fabric and
micro-reinforcement.

Author(s)
Joe Smetana,Kim Morton,Roger Theelen,Kent Steeves
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

CAF Property Investigation by Estimating Resin Systems and Resin/Fiber Interface

Copper migration such as conductive anodic filaments (CAF) has become a serious problem for printed wiring
boards (PWBs). As the relation between CAF and matrix resin properties is not clear,the relation has been
investigated by estimating the influence of resin properties and resin/glass fiber interfaces on the CAF property.
New evaluation techniques have been applied to resin materials affecting CAF. The dissolution of copper ions
surface into the matrix resin in contact was measured electrochemically. The amount of copper absorbed on the resin
powder surface was measured by atomic absorption spectroscopy. It was found that some CAF-restraining resin
systems will either prevent copper dissolution or capture the dissolved copper ions. A new resin system modified for
such purpose showed better CAF resistance than the conventional resin system.
In addition,the interface adhesion strength was estimated by using an acoustic emission (AE) method. It was found
that a new system called Filler Interface Control System (here-in-after: FICS) will afford good interface adhesion
and resultant good CAF resistance.

Author(s)
Kazuhito Kobayashi,Nozomu Takano,Ken-ichi Ikeda,Hikari Murai
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

BGA Mounting Using Improved Solder Columns

BGAs are usually solder-reflowed on substrates,which are frequently made of a different material than that of the
BGAs,which results in a TCE Mismatch between the components. If such an assembly includes a large size BGA,
and is exposed to thermal or power cycling,the solder joints undergo a high level of stress,which could ultimately
lead to the premature failure of the assembly.
This has been one of the challenging problems in the electronics industry. Several designs have been proposed in the
past to counteract the unfavorable effect of such conditions. For example,the author,together with other coinventors,
had addressed this problem,starting in 1982. They invented what was called CCMD,Chip Carrier
Mounting Device,later called Cherian Columns or Solder Columns or Solder Quick. These solutions were useful at
their time,and were covered by a number of patents. Other attempts have been made by additional inventors. Some
were more successful than others.
An additional current problem however,is the fact that many of the components are being miniaturized. The center
distances between contact pads are getting smaller and smaller,and the old inventions can no longer keep up with
such miniaturization. For example,BGAs have center distances down to 0.020 inch (approx. 0.5 mm) and when
Chip Scale Packaging is considered,the center distances are even smaller. The Solder Columns were originally
designed and built to work with 0.050 inch (approx. 1.25 mm) center distances. They cannot be simply scaled down
to size.
For this reason,the author has re-visited this problem and came up with improved solder columns. In this paper,
some of the findings will be shared along with a few of the suggestions and solutions that resulted from this research
and studies.

Author(s)
Gabe Cherian
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

Benchmarking PCB Process Capability,Quality and Reliability Becomes a Reality

The IPC-PCQR2 (Process Capability,Quality and Relative Reliability) program has developed a library of process
capability panel designs,and a database that details the manufacturing capability,quality,and reliability of printed
circuit board suppliers. The database includes comprehensive reports of each supplier's capabilities,reports that
allow for a direct statistical comparison of suppliers,and reports that provide a concise summary of the industry's
performance at large. This paper presents background information on the PCQR2 program,and the latest industry
performance data collected by the PCQR2 program.

Author(s)
David L. Wolf,Timothy A. Estes,Ronald J. Rhodes
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

Automated Optical Inspection (AOI) - A Yield Management Solution for the High Density Interconnection (HDI) - Flexible Circuit Industry

The information age has arrived. A growing percentage of the Earth’s population now has access to pagers,cellular
phones,computers,personal digital assistants (PDA’s),and a host of other electronic devices. We can now instantly
communicate around the globe with a device that fits into the palm of the hand. To meet these demands,packaging
houses are shrinking the pitch of their interconnects to assist in reducing overall package size. Some of these
developments are made possible through advances in HDI (High Density Interconnect) flexible circuit technology -
its key attributes being packaging adaptability,circuit density,and configurability on less real estate. Almost every
flexible packaging company has a road map to reduce the pitch of the conductor traces below 50mm. Many flexible
circuit designs with areas of 50mm pitch are already in production. Designs are on the drawing board to shrink the
pitch to 30 mm.
The demand for increased packaging density has intensified pressure on process,production,and quality personnel
to ensure product can be produced in a timely manner at acceptable yields. Electrical testing can detect opens and
shorts in the package,but cannot detect the near opens or near shorts that cause early field failures. Visual inspection
by humans is virtually impossible,not to mention unreliable given the reduced circuit pitch configurations. These
traditional inspection methods do not produce process feedback to improve the manufacturing process. Automated
Optical Inspection (AOI) is now a necessary production tool to produce quality product at acceptable yields.
However,standard AOI technology cannot accurately inspect the fine pitches being manufactured in the HDI
flexible circuit arena. This paper will discuss a method for implementing AOI into HDI-flex manufacturing and how
it serves as an enabling technology by providing reliable,consistent 100% inspection. Furthermore,this paper will
illustrate how proper implementation and integration of AOI can provide real-time process feedback and the
resultant yield increases that accrue.

Author(s)
Thomas Cinque,James Borges,Antonius J. Schless,Howard Imhof
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003

Aqueous Base Compatible Waveguide Materials for Optical Interconnect Applications

There are a number of organic,inorganic,and hybrid inorganic waveguide materials that are currently being used for
a wide variety of optical interconnect applications. Depending upon the approach,waveguide formation is
performed using a combination of lithographic and/or reactive ion etch (RIE) techniques. Often the processes
involved with waveguide formation require unique processing conditions,hazardous process chemicals,and
specialized pieces of capital equipment. In addition,many of the materials have been optimized for silicon substrates
but are not compatible with printed wire board (PWB) substrates and processes.
We have developed compositions and processes suitable for the creation of optical,planar waveguides on both
silicon and PWB substrates. Based on silicate technology,these compositions use lithographic techniques to define
waveguides,including aqueous,alkaline development. The resulting planar waveguides take advantage of the glasslike
nature of silicate chemistry wedded with the simplicity of standard lithographic processes. Attenuation at typical
wavelengths has been found to compete well with the non-silicate-based technologies available today. Single-mode
(SM) and multi-mode (MM) waveguides with losses ranging from 0.5 dB/cm @ 1550nm,0.15 dB/cm @1320nm,
and <0.1 @ 850nm are feasible. Composition,process and physical properties such as optical,thermal and
mechanical properties will be discussed.

Author(s)
Jim Shelnut,Matt Moynihan,Luke Little,Nick Pugliano,Bruno Sicard,Henry Zheng,Tuan Ho,Craig Allen,Garo Khanarian
Resource Type
Technical Paper
Event
IPC Printed Circuits Expo 2003