Thermo-Electric Cooler Module Reliability Improvements for CT Detector Subsystem

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Thermo-electric coolers (TEC's) are becoming increasingly popular in the medical device industry,where design space is limited and high heat transfer capacity is needed. For a Computed Tomography (CT) reference module application,an integrated TEC + copper heat pipe assembly was used to regulate temperature of a precision photodiode sensor array. Due to the extended service life of a CT scanner,10 year reliability of all components is required. Through accelerated testing of the TEC assembly using rapid switching of the TEC in both heating and cooling modes,it was determined that the existing design only met one year of life. Failure analysis was performed on the TEC units and dice cracking as well as burned dice due to thermal hotspots were observed. Through discussions with the TEC vendor,a higher temperature TEC solder material was evaluated on future assemblies,allowing for higher thermal excursions and also better CTE matching to the TEC ceramic. Subsequent reliability testing on the higher temperature solder assemblies showed more than 3x performance improvement,thereby exceeding the 10 year life requirement. In addition high temperature/humidity/biased (85C/85%RH) was tested for 500hr. At the end of the test a small drift in performance was observed,failure analysis will be presented. In addition to the design improvement and learnings,the reliability experimental setup showcased an effective method for acquiring quick cycling data on TEC while evaluating the assemblies over a wide thermal range. This setup utilized the self-heating/cooling of the TEC and mounted the assembly on a fixed temperature plate. Finally,specifics as to boundary condition testing of a TEC assembly and also the PID control implementation of the TEC via an FPGA based design will be discussed.

Author(s)
Mahesh Narayanaswami,Reinaldo Gonzalez
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

How to Use the Right Flux for the Selective Soldering Application

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The selective soldering application requires a combination of performance attributes that traditional liquid fluxes designed for wave soldering applications cannot fulfill. First,the flux deposition on the board needs to be carefully controlled. Proper fine tuning of the flux physicochemical characteristics combined with a process optimization are mandatory to strike the right balance between solderability and reliability. However,localization of the flux residue through the drop jet process is not enough to guarantee the expected performance level. The flux needs to be designed to minimize the impact of unavoidable spreading and splashing events. From this perspective a fundamental understanding of the relationships between formulation and reliability is critical. In this application,thermal history of the flux residues (from room temperature to solder liquidus) is a key performance driver. Finally,it is necessary to conduct statistically designed experiments on industrial selective soldering machines in order to map the relationships between flux characteristics and selective process friendliness. In this area,multiple performance attributes will be considered: compatibility with drop jet dispensing (clogging effects,cleaning frequency,and satellite formation),spreading (in actual processing conditions,with multiple solder resist types) and soldering performance as measured by barrel filling and defect production in challenging thermal conditions. Therefore,a strong partnership between the flux designer and the equipment manufacturer is a key component of a robust flux design for selective soldering.

Author(s)
Bruno Tolla Ph.D.,Denis Jean,Xiang Wei Ph.D.
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Design Improvements for Selective Soldering Assemblies

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Selective soldering,along with pin-in-paste reflow and press fit,is the primary assembly method for through-hole components. The reflow process is limited by component dimensions and heat resistance. Press fit becomes expensive when defects occur that cannot be repaired. Electronic manufacturing services realize that surface mount technology (SMT)cannot replace the through-hole technology completely. The selective soldering process offers opportunities to make solder connections on different levels,connecting housings,junction boxes,aluminum parts,stacking PCBs and more. Designers of new board assemblies can benefit from the specialized soldering nozzles and robotics capabilities that modern selective soldering machines offer. Selective soldering can be achieved under an angle (tilt) as in wave soldering or horizontally with different shaped nozzles and nozzle materials. All have different properties and can be applied to successfully soldering the most complex assemblies. In order to optimize production and soldering efficiency,assembly engineers should be involved in the design for assembly process. Knowledge of the selective soldering process and nozzle technology may offer competitive advantages when implemented in new design and assembly processes. Studies have been done to determine minimum distances to adjacent components,especially surface mount devices (SMD). Questions asked include,“What pin to hole ratio provides the best hole filling?” and “How much influence has flux selection on soldering results,and which nozzles should be used?” Historical data is combined with several design of experiments looking for soldering defects,such as bridging,but also seeking process optimization to achieve the best hole filling. Hole filling is critical for high thermal mass boards. The thick copper layers absorb a great deal of heat from the preheating and liquid solder. Special design modifications will result in more heat in the solder barrel,which will guide the solder to the solder destination side of the board. Combining the right nozzle selection with correct solder acceleration and deceleration will ensure that even the most difficult to create joints will meet the IPC-A-610 requirements.

Author(s)
Gerjan Diepstraten
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Elimination of Wave Soldering Process

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Wave soldering of pin through hole devices has been around for a very long time. It is a process that everyone says will go away and each year it is still being used. In the industry,wave solder is to this day considered more art than science,although there is much more effort to characterize the process as much as possible. Pin through hole devices tend to be lower cost than surface mount technology components and through hole soldering tend to have robust solder joints that,in most cases,will outlast surface mount components. The wave solder process has many variables that an engineer need to manage to meet the hole fill requirements on complex board designs: board design,component design,flux types and application methods,pre-heating,solder alloy,dross formation,wave types,etc. This paper will explore the alternatives to wave solder,such as paste in hole,selective solder,and robotic soldering processes. The advantages and disadvantages will be discussed for each process type,in addition to how each process works. The paper will explore some of the key items in making a decision on which process is most suitable for the application being considered.

Author(s)
David Geiger,Murad Kurwa
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

AXI Voiding Detection on High Power Transistor

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High Power Transistors contain materials and structure that pose unique challenges to AXI technologies. The work discusses traditional AXI imaging and processing techniques and their limitations in very heavily shaded,and non-uniformly shaded situations. The work further discusses methods for voiding detection and presents a novel technique developed to overcome challenges presented by Copper Coin Power Transistors. Lastly the work presents considerations for optimal region size and data presentation to support testing to component-level voiding specifications.

Author(s)
Tracy Eliasson,Ricardo Corona Torres
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Defect Features Detected by Acoustic Emission for Flip-Chip CGA/FCBGA/PBGA/FPGBA Packages and Assemblies

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C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination,cracks,voids,and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison,representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques. Key images gathered and compared are:
•Compare the images of 2D x-ray and C-SAM for a plastic LGA assembly showing features that could be detected by either NDE technique. For this specific case,x-ray was a clear winner.
•Evaluate flip-chip CGA and FCBGA assemblies with and without heat sink by C-SAM. Evaluation was to evaluation defect condition of underfill and bump quality. Cross-sectional microscopy performed to compare defect features detected by C-SAM.
•Analyze a number of fine pitch PBGA assemblies by C-SAM to detect the internal features of the package assemblies and solder joint failure at either package or board levels.
•Twenty times touch up by solder iron having 700?F,each with 5-7seconds and induced defects were analyzed by C-SAM images.

Author(s)
Reza Ghaffarian Ph.D.
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Nondestructive Inspection of Underfill Layers Stacked up in Ceramics-Organics-Ceramics Packages with Scanning Acoustic Tomography (SAT)

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Ceramics packages are being used in the electronics industry to operate the devices in harsh environments. In this paper we report a study on acoustic imaging technology for nondestructively inspecting underfill layers connecting organic interposers sandwiched between two ceramics substrates. First,we inspected the samples with transmission mode of scanning acoustic tomography (SAT) system,an inspection routine usually employed in assembly lines because of its simpler interpretation criteria: flawed region blocks the acoustic wave and appears darker. In this multilayer sample,this approach does not offer the crucial information at which layer of underfill has flaws. To resolve this issue,we use C-Mode Scanning in reflection mode to image layer by layer utilizing ultrasound frequencies from 15MHz to 120MHz. Although the sample is thick and contains at least 5 internal material interfaces,we are able to identify defective underfill layer interfaces.

Author(s)
Justin Zheng,Francoise Sarrazin,Jie Lian Ph.D.,Zhen Feng Ph.D.,Lea Su,Dennis Willie,David Geiger,Masafumi Takada,Natsuki Sugaya,George Tint Ph.D.
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Material Effects of Laser Energy When Processing Circuit Board Substrates during Depaneling

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Using modern laser systems for the depanelization of circuit boards can create some challenges for the production engineer when it is compared to traditional mechanical singulation methods. Understanding the effects of the laser energy to the substrate material properly is essential in order to take advantage of the technology without creating unintended side effects. This paper presents an in-depth analysis of the various laser system operating parameters that were performed to determine the resulting substrate material temperature changes. A theoretical model was developed and compared to actual measurements. The investigation includes how the temperature increase resulting from laser energy during depaneling affects the properties of the PCB substrate,which varies from no measurable change to a lowering of the surface resistance of the cut wall depending on the cutting parameters. In addition the amount and properties of the ejecta that are potentially resulting from the laser processing is investigated. Understanding the composition and quantity of any resulting residue may have a great impact to both the board design and the selection of the appropriate circuit board singulation method that will achieve the best possible results. An Energy Dispersive X-ray Analysis method (EDX) was performed to investigate if any unwanted material compounds are present on the cutting sidewalls of an FR4 circuit board substrate as a result of laser energy induced during the depaneling process.

Author(s)
Ahne Oosterhof
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

High Throw Electroless Copper - Enabling new Opportunities for IC Substrates and HDI Manufacturing

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Two new electroless copper baths have been developed to cope with upcoming miniaturization challenges in the high-end IC substrate segment as well as in the evolving HDI board market. The main challenge to be overcome is the reduction of the differential etch in the pattern plating process by decreased electroless copper thickness on the surface of the build-up layer. To this end,several requirements need to be fulfilled to ensure a safe and high yield production. First of all,the throwing power performance of E’less Copper IC and E’less Copper HDI especially in the wedges respectively at the bottom of the BMVs is crucial for the via-filling performance due to conductivity requirements. Two reliable throwing power measurement methods have been introduced and throwing power results presented in this paper show that the new electroless copper baths constantly achieve significantly better throwing power performance compared to the reference systems that are industry standards in the respective markets. A minimum target thickness of the electroless copper layer in the BMV (wedges) is therefore ensured while the thickness on the surface can be reduced for improved L/S resolution. Secondly,the adhesion of the copper layer on the bare laminate is a basic requirement for the high-end IC substrates manufacturing process. Favorable internal stress characteristics of the copper layer of the E’less Copper IC bath combined with excellent peel strength results ensure a reliable and strong adhesion of the copper layer on the resin surface. Thirdly,dry film adhesion and differential etching are key process steps for high yield manufacturing. The surface morphology of the E’less Copper IC layer enables improved mechanical anchoring of the dry film compared to the reference system and dry film adhesion data for E’less Copper HDI is under evaluation. Both electroless copper baths were thoroughly tested for industry standard reliability requirements and achieved excellent results.

Author(s)
Tobias Sponholz,Lars-Eric Pribyl,Frank Brüning,Robin Taylor
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016

Development of a Consistent and Reliable Thermal Conductivity Measurement Method,Adapted to Typical Composite Materials Used in the PCB Industry

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Most of today’s printed circuit board base materials are anisotropic and it is not possible to use a simple method to measure thermal conductivity along the different axis,especially when a good accuracy is expected. Few base material suppliers’ datasheet show X,Y and Z thermal conductivities. In most cases,a single value is given,moreover determined with a generic methodology,and not necessarily adapted to the reality of glass-reinforced composites with a strong anisotropy. After reminding of the fundamentals in thermal science,this paper gives an overview of the state-of the art in terms of thermal conductivity measurement on PCB base materials,and some typical values. It finally proposes an innovative method called transient fin method,and associated test sample,to perform reliable and consistent in plane thermal conductivity measurement on anisotropic PCB base materials.

Author(s)
François Lechleiter,Yves Jannot
Resource Type
Technical Paper
Event
IPC APEX EXPO 2016