Founder/CEO
Aqueous Technologies, Corona, CA, USA. Reliability Matters Podcast, Corona, CA, USA

Summary/Abstract

Why Are We Cleaning No-Clean Flux? Answers to an Oxymoron.  

Miniaturization, IOT, and the more frequent deployment of electronics into harsh environments has resulted in the reduction of residue tolerance on many circuit assemblies.  Common residues from board and component fabrication, process, humans, and flux, in totality, have created an environment whereby the volume of residues exceeds many assemblies’ ability to tolerate them.

While the traditional reason to implement a post-reflow cleaning process was to prevent electro-chemical migration (ECM) failures, modern circuit assemblies populated with fine-pitch, bottom terminated components operating in harsh environments and subjected to IPC's new cleanliness standards have broadened the variety of problematic residues and raised the level of required cleanliness.

This course will outline specific problematic residues and their associated failure mechanisms. Cleanliness quantification methods will be presented including a detailed overview of IPC's new cleanliness testing and process monitoring requirements outlined in IPC J-STD001H.

Speaker Bio 

Mike began his career in the electronic assembly equipment industry in 1985. Mike founded Aqueous Technologies in 1992 in response to the Montreal Protocol and the resulting international treaty banning most popular cleaning/defluxing solvents. Mike is an internationally known speaker on the subject of increasing reliability through contamination removal and cleanliness quantification techniques and procedures. Mike was awarded “Distinguish Speaker Status” with SMTA in 2018 and received the “Rich Freiberger Best of Conference Award” in 2019. Mike is also a member of the SMTA Global Board of Directors where he is Vice President of Communications. Mike is also Vice President of Technical Programs for the Los Angeles / Orange County SMTA Chapter. Mike is the host of the popular Reliability Matters Podcast.

Senior Reliability Engineer
Ericsson AB, Stockholm, Sweden

Summary/Abstract

Solder joint fatigue is a typical failure mechanism for electronic equipment subjected to temperature cycling during operation. Telecom remote radio units are stressed with a combination of environmental temperature and equipment self-heating variations due to varying load levels that sometimes are severe. As this problem is more pronounced for remote radios, and the number produced and delivered by Ericsson is increasing, the importance and risk of this issue has increased significantly. In addition, the operating temperature of components on Ericsson’s products has increased, resulting in overall higher stress levels, this study tries to investigate the components for different packages.

In this study, we utilized the Sherlock software tool to evaluate the reliability of solder joints on a printed circuit board (PCB) subjected to temperature cycling conditions. The test conditions were designed based on IPC-9701 standard guidelines. The PCB assembly was subjected to temperature cycling tests in a chamber with a range of -40°C to 125°C. The test duration was set at 1000 cycles. After the test, the solder joints were analyzed using dye & pry analysis, cross-section analysis, and shear test analysis. 

Based on the analysis results, we found that some of the solder joints exhibited signs of fatigue failure, while others showed good reliability performance. Simulation using Sherlock tool showed a good correlation with the actual test results.

Furthermore, the simulation results were used to identify the root cause of the failure and to propose a design change that would improve the reliability of the solder joints. The proposed design change was implemented, and the assembly was subjected to the same temperature cycling test.

This study demonstrates the effectiveness of using a combination of simulation and testing to evaluate the reliability of solder joints and identify potential design improvements to enhance their performance

Consulting Engineer
Northrop Grumman Systems Corporation, Baltimore, MD, USA

Summary/Abstract

IPC Class 3 Electronics represent a category of electronics with high reliability, long life, and fail-proof quality for mission critical military, aerospace, and medical applications. Industry has been focusing on the critical aspects to ensure the compliance to customers’ needs including using high quality electronics components with consistent de-rating, conducting rigorous screening and endurance testing. However, implementing the Air Force proposed Avionics/Electronics Integrity Program (AVIP) will help achieve required performance over the life of the electronics with linkages to related systems engineering areas.

Historically, many programs have not planned or scheduled comprehensive systems engineering efforts that link and properly phase the tasks of all appropriate disciplines. AVIP ensures the consideration of all usages, environments, and support by the customer (MIL-HDBK-87244, USAF). These factors are analyzed throughout the development process to ensure the equipment is capable of required performance while experiencing the cumulative effects of the environments in any combination the equipment is expected to experience during its durability/economic life.

Northrop Grumman Systems Corporation (NGSC) has successfully supported the customers with mandates in the electronics design processes to ensure compliance to customers’ needs. One of the major challenges NGSC engineering team experienced is the lack of understanding early in the development phase of how the electronic equipment was to be used during its durability/economic life. This presentation will discuss the segmented requirements and lessons learned from a Northrop Grumman Systems Corporation program. The goal is to come up with a practical proposal to consider Avionics/Electronics Integrity Program (AVIP) guidelines for the integration of reliability, maintainability, and other factors to ensure high reliability of electronics. 

Speaker Bio

Raymond Zhao is a Consulting Engineer working for Northrop Grumman Corporation since 2004. He has over 40 years of experience working at positions with increasing responsibilities. His areas of expertise within the mechanical domain include airworthiness, safety of flight structural analysis, and damage-tolerance / fatigue evaluation of airborne structures. He is currently leading a multi-disciplinary airworthiness team in the Airborne Surveillance Hardware Engineering organization (MS, Baltimore). Raymond has a Ph.D. degree in Engineering Mechanics from University of Illinois.

Vice President of Technology
Summit Interconnect, Anaheim, CA, USA

Summary/Abstract

Microvias have been a great enabler for allowing High Density Interconnections (HDI).  The employment of microvias began without a thorough understanding of the reliability of the HDI connections, especially when multiple depth microvias were utilized. 

The early testing methods of microvias were unable to measure the resistance of a daisy chain network at the reflow precondition process. For example, the two-step method of reflow resistance testing followed by thermal shock testing can show passing results of stacked microvias for thermal shock, yet which had failed reflow conditions.  Earlier test methods preconditioned the test coupons to 6X reflow cycles but didn’t measure for resistance change.  With the use of IPC-TM-650 2.6.27 and 2.6.7.2 test methods, the industry has a greater understanding of the reliability of the design and a finished design fabrication. A deeper understanding is now possible with the use of microvia reliability simulation tools. The simulation tools now allow a design to be vetted for the material selection, the selection of the dielectrics construction, the diameter of the microvia, and the pitch of the design.

The purpose of this presentation is to share with the PCB design community information regarding when and where it is safe to stack microvias many levels deep, and where in the same design that staggering of microvias is necessary at every level.  This presentation will demonstrate that it is possible to use 4 stack microvias in tight pitch devices, along with staggered microvias outside the tightly pitched devices. This presentation will also demonstrate that material expansion, pitch, microvia diameter, reflow temperature, and the length of the stacked microvia, are contributing attributes to the final reliability of the microvia.

Speaker Bio

Gerry Partida is the Vice President of Technology for Summit Interconnect, a world class PCB Fabricator. Gerry began his career in the Printed Circuit Board industry in 1984 at Everett Charles Test Equipment, and joined Optrotech/Orbotech in 1986. He was a member of the team that introduced CAM automation, net list compare, AOI/CAD reference to the PCB industry. His current position is focused on manufacturing cutting edge high density interconnect, high speed digital, Flex/Rigid Flex and RF/microwave printed circuit boards for military and commercial industries. He is a subject matter expert on IPC-6012, and a member of the IPC-6012 and IPC-6018 review committees. Gerry recently has become a Vice-Chair for IPC-6012/IPC-A-600 & IPC-V-TSL-MVIA Microvia Task Force.

President
LILOTREE, Redmond, WA, USA

Summary/Abstract

Due to tremendous growth in Information Technology equipment in the Big Data/server applications, 5G-6G-high frequency, Edge Computing, Artificial Intelligent (AI) applications recently, the hardware reliability of these equipment is critical and paid more attention in the industry. With harsh environment and severe air pollution, hardware equipment is subjected to severe corrosion and reduce lifetime. Among various materials used in the electronics assembly, reliability evaluation of surface finishes on printed circuit boards (PCBs) is critical for long terms optimal operation of the equipment. The failure mode due to exposure to long term harsh environment, air pollution, etc. involves creep corrosion which can potentially cause electrical short failure. It is important to evaluate for the robustness against creep corrosion occurrence in the electronic assemblies.

Mixed Flowing-Gas (MFG) test is an environmental stress laboratory test intended to simulate contaminated industrial ambiance. There are many controllable parameters, including temperature, relative humidity, corrosive gases type (e.g. H2S, Cl2, NO2, SO2, NH3 and O3…etc.), concentration and gaseous flowing rate, etc. Because many controllable parameters, complex equipment setup and continuous constant-flowing corrosive gases, MFG test is a popular accelerated corrosion test that has high availability to simulate the field environment corrosion. In order to observe the effective corrosive reactivity within a short period of time, a MFG test condition from International Electronics Manufacturing Initiative (iNEMI) was adopted in this research. iNEMI MFG test condition has high concentration of hydrogen sulfide (H2S), mixed with multiple corrosive gases that is an effective accelerated condition for corrosion test.

Various, surface finishes were evaluated including Electroless Nickel Immersion Gold (ENIG), Immersion Sn, Organic Solderable Preservative (OSP), novel Ni-free surface finish. Creep corrosion tendencies and robustness were compared among various surface finish options and long-term reliability in harsh environmental conditions is evaluated.

Speaker Bio

Kunal Shah, Ph.D. is a President and chief Scientist at LiloTree. Dr. Shah leads efforts of advanced engineered materials development and product improvement solutions at LiloTree for numerous customers in various industries including aviation-aerospace, medical electronics, semiconductors, etc. He has been the key member in development of proprietary, innovative, award-winning and commercially-successful ENIG-Premium, Ni-less ENIG-Premium and other plating- surface finish solutions for optimum performance and better reliability of electronic assemblies. These technologies are now being accessed by leading electronics manufacturers globally. Previously, Dr. Shah worked as a Sr. Research Scientist at Intel Corporation and Pacific Northwest National Lab (PNNL). At Intel, he developed polymer interlayer, dielectric and passivation material that led to the design, adoption and integration of polymer passivation materials in Intel IC products in 2008. He is a recipient of several global technology awards and has authored several scientific papers & issued/pending patents for more than two decades.

Technical Solutions Manager
ZESTRON Corporation, Manassas, Virginia, USA.

Summary/Abstract

When introducing a new process, machine, or material, it is necessary to undergo a qualification event according to the updated IPC-J-Std-001 H Revision. Specifically, when altering certain materials or cleaning solutions, it is crucial to establish objective evidence that the proposed improvement does not increase the risk of residual unused material or flux. Instead, it should enhance the effectiveness of residue removal. Failure to address flux residues on the Printed Circuit Board Assembly (PCBA) may lead to product failure caused by electrochemical reactions during usage.

To accurately assess the risk, the CM or OEM must gather quantitative data before implementing any process changes. This presentation emphasizes the importance of employing specific tools and analytical measurements, such as Surface Insulation Resistance (SIR), Ion Chromatography, and Rose testing, to ensure the reliability of the product. Real-life implementation of a material change and the subsequent qualification process serve as valuable examples discussed in this presentation.

Keywords: IPC-J-Std-001, Electronics Industry, Implementation, Product Failure, Electrochemical Reactions, Qualification, SIR, Ion Chromatography, Rose Testing, IPC-TM-650

Speaker Bio 

Denis Barbini, Ph.D., is an esteemed electronics manufacturing and assembly professional. Formerly the Associate Director of the A.R.E.A. Consortium, he led the identification of critical needs in emerging technologies and assembly processes. With extensive hands-on experience, Denis has provided invaluable guidance and solutions to companies worldwide. His expertise lies in implementing cost-effective, reliable, and robust processes for electronic devices. Recently, he transitioned to the role of ZESTRON's Technical Solutions Manager, leveraging his 25 years of experience to drive the development of critical projects and explore new industry sectors. Denis's technical prowess, extensive experience, and commitment to innovation make him a respected authority in the field, shaping advancements and enabling excellence in manufacturing processes.

Director of Primary Metallization
MacDermid Alpha ElectronicS Solutions, Waterbury, CT, USA

Summary/Abstract

Miniaturization, faster signal speeds, and increased functionality are drivers within electronics manufacturing. These challenges put pressure on the manufacturing process to address these issues while maintaining or improving end-product reliability - with laser-drilled microvia (MV) reliability being paramount.

Electroless copper has been the dominant technology to metallize non-conductive surfaces of PCBs and IC substrates. However, this technology has several disadvantages regarding worker safety (Group 1 carcinogens), poor reliability due to process control, and a high amount of waste generation. Recently, we have perfected a direct metallization process which addresses all the environmental concerns plus demonstrable, improved reliability. 

Direct metallization (DM) enables direct bonding between Base Copper and Electroplated Copper significantly reducing or eliminating interfacial defects that can occur in Electroless Copper processing, such as nano and micro-voids, separation at the target pad, etc. DM promotes epitaxial, copper crystalline growth, which is the strongest bond possible. Its reliability has been demonstrated through various reliability tests, including OM testing, IST, thermal shock tests, etc.

DM is highly environmentally friendly compared to the electroless copper process, as DM has fewer process steps, operates at low temperature, and employs a simple yet reliable working bath composition. As a result, it significantly reduces water usage, power consumption, chemical usage, and wastewater treatment leading to a substantial reduction in CO2 emissions. Furthermore, the implementation of a Zero-Discharge System - a wastewater recycling technology - allows for the removal of various ions and bacteria, enabling up to a 98% reduction of water usage through rinse water reuse.

In conclusion, Direct Metallization is a PCB and IC substrate fabrication technology which offers improved MV reliability through direct copper-to-copper bonding while delivering sustainability gains across the supply chain – important to the OEM and fabricator alike.

Speaker Bio

Kwangsuk Kim (Leslie Kim) is the Director of Primary Metallization at MacDermid Alpha Electronics Solutions. In his 24 years with MacDermid Alpha he has dedicated himself to the development and application of new processes and technologies in high technology PCB, IC substrate, LED and molded interconnects. He holds a Bachelor’s degree in Applied Chemistry and a Master’s in Business Administration, both from AJou U. in Korea. Prior to his current role in the USA, Mr. Kim spent 16 years with the company in Korea including New Product Development for processes including Via Fill Copper plating, Brown Oxide, Desmear, etc. for both PCB and IC substrate fabrication.

Engineering Technical Specialist
Honeywell, Contractor for the Department of Energy’s Kansas City National Security Campus, Kansas City, MO, USA.

Summary/Abstract

Modern printed wiring assembly companies have many modern fluxes to choose from, which help reduce voiding under parts, increase solderability, and for the most part is considered lead free fluxes. Lead Free fluxes tend to need higher heat to activate and need to have more robust soldering approaches to make sure they do not cause any harm to the assembly.

High reliability companies for years have utilized fluxes which were designed for tin/lead processing. These fluxes tended to be robust but were never designed to handle the smaller pitch spacing, more complex assemblies, and higher activation processing requirements of lead- free fluxes. With the industry going more and more for lead free plating on parts and lead-free processing to meet numerous environmental rules that are in place within the electronic industry. 

Numerous High Reliability companies are still utilizing tin lead processing as they have been grandfathered due to the nature of the product they manufacture. This paper will discuss the numerous levels of testing required by numerous high reliability companies to use lead free fluxes in a tin lead assembly. 

The paper will document selection criteria, testing criteria, utilization of materials that are designed for lead-free processing with a high temperature activation for low temperature parts and assemblies. This paper will also document what can happen if criteria are not followed in an organized and scientific approach to testing. The testing will include SIR data, Ion Chromatographic testing, Solderability testing and aging of materials on assemblies to simulate 15 year life span.

Speaker Bio

William Capen has been in the Electronic Industry for 32 years. Bill started on the production floor as a smt. technician. After numerous years as a technician Bill went back and completed his Bachelors in Industrial Management from the University of Wisconsin Stout. After getting his degree worked numerous engineering positions with focus on SMT through Selective solder. Bill has written and presented numerous papers at other trade industry conferences with focus on high reliability and cleaning.

Electronics Manufacturing Engineer
The Johns Hopkins Applied Physics Lab, Laurel, MD, USA

Summary/Abstract

While conformal coating is a standard practice for most final product PWAs, the application process does not allow for conformal coating material to cover the area beneath a CGA or BGA. At best the edges get trace coating and can act as somewhat of a barrier to FOD threatening to lodge between inner columns. 

For this study I will be conducting a qualification on both the process and reliability of paralyene undercoating for BGAs and CGAs. 

If the findings prove to provide an enhancement to reliability, this process could be publicized at a recommended best practice for Class 1 or high risk applications. 

Speaker Bio

Rachel has worked as a manufacturing engineer in defense and aerospace applications for over three years since graduating from the University of Wisconsin-Madison. For the past two years she has been at the Johns Hopkins Applied Physics Laboratory supporting a variety of high-mix low-volume projects areas. Her current concentration is in Space the Exploration missions IMAP and Dragonfly in the flight production and prototyping phases respectively. After attending IPC APEX in 2022 as an Emerging Engineer, she has pursued continued involvement in IPC through conference and A-team involvement.

Global Head e-Mobility & Infrastructure
Indium Corporation

Summary/Abstract

This session centers on resolving durability concerns pertaining to PCBAs in e-Mobility infrastructure, encompassing electric vehicles, charging stations, and Battery Energy Storage System. The session delves into assembly design challenges and offers solutions for constructing more dependable systems. Through a collaborative study involving Indium, KYZEN, and Dow, three industry experts present valuable insights to improve uptime performance, thus mitigating costly warranty repairs and enhancing customer satisfaction. The session aims to provide practical strategies for enhancing the reliability of e-Mobility components and optimizing the overall user experience.

Speaker Bio

Brian O'Leary is responsible for promoting Indium Corporation's full range of products and services for e-Mobility, which includes electric cars, trucks, eVTOLs, charging stations, etc. He joined Indium Corporation in 2014 and has more than 20 years of experience in the electronics industry. He authored two books on thermal profiling called Profiling Guide for Profitability and Profiling Guide for Six Sigma. He currently serves as the chair of the IPC e-Mobility Quality & Reliability Advisory Council. In addition to regular technical conference participation, he co-hosts a free monthly webcast—EV InSIDER Live—with Loren McDonald of EVAdoption, interviewing a special high-profile guest.  In the webcast, they discuss current pressing issues and hot topics in the rapidly evolving electric vehicle landscape. 2023, Brian will be launching a new webcast focused on the many technical and manufacturing challenges of building our e-Mobility future.

Technical Leader, Electrical Engineering
Cisco Systems

Summary/ Abstract

When you hear the words “high reliability,” what do they mean to you?  In this panel session, industry experts will provide their definitions of high reliability and what they, as consumers and citizens of the world, expect of high reliability products.  This will set the stage for the presentations and discussion that follow during the 2023 IPC High Reliability Forum.

Speaker Bio

Experienced Technical Leader with a demonstrated history of technical, leadership, and communications skills. Having had fourteen years design experience and over 22 years manufacturing experience is a benefit to both engineering and manufacturing teams in all aspects of hardware design and production. Experience in writing software also enables identification and resolution of issues from a software perspective.

President
Precision Analytical Laboratory, Inc.

SUMMARY/ABSTRACT

The goal of this session would be to provide a “test labs” perspective for understanding the “Objective Evidence” requirements that are now called out in section 8 of IPC-J-STD-001.  In this session, we will discuss what is “Objective Evidence” and how to understand section 8.  In addition, we will give some practical advice for ways to evaluate a process in order to establish the evidence necessary to meet the requirements.  

SPEAKER BIO

Joe is the President of Precision Analytical Laboratory, Inc., in Kokomo, Indiana.   He has been involved in the analysis of chemical residues on electronic assemblies for the past 28 years, first with Contamination Studies Laboratories and now with his own business.  Joe is a leader in IPC and currently chairs the 7-11 Test Methods Subcommittee. He also maintains involvement with the 5-32G Residue Task Group and J-STD-004 Task Group. Joe’s expertise lies in the analysis of manufacturing residues and the determination of the effects of those residues on the performance of electronic assemblies.  In Joe’s free time, he enjoys spending time with his wife and their four children working their small cattle farm. 

PRESIDENT OF SUPPLY CHAIN TRANSFORMATION
EXIGER

Summary/Abstract

The first portion of this session will cover the future threat and policy landscape facing the US microelectronics industry as major challenges like the changing global policy environment, compliance requirements such as the UFLPA, critical component and mineral shortages, and a diminishing manufacturer base continue to impact microelectronics supply chains.  Current compliance approaches will be covered, concluding with likely scenarios for the next 5-10 years, including ramifications of continuing tensions with China.

SPEAKER BIO

Trevor Stansbury is the President of Supply Chain Transformation at Exiger, where he serves as a senior operational executive and senior subject matter expert on Exiger’s multi-tier supply chain visibility, transformation, and risk management solutions. Previously, Trevor served as the CEO and Founder of Supply Dynamics, which was acquired by Exiger in 2022. At Supply Dynamics, he led supply chain transformations for the world’s largest manufacturing companies, including Lockheed Martin, Raytheon, Honeywell, Oshkosh Corporation, Thyssenkrupp and General Electric. Trevor has also held senior supply chain roles at advanced aerospace and defense companies, including Honeywell and Boeing.

Senior Vice President of Strategy
Exiger

Summary/Abstract

The first portion of this session will cover the future threat and policy landscape facing the US microelectronics industry as major challenges like the changing global policy environment, compliance requirements such as the UFLPA, critical component and mineral shortages, and a diminishing manufacturer base continue to impact microelectronics supply chains.  Current compliance approaches will be covered, concluding with likely scenarios for the next 5-10 years, including ramifications of continuing tensions with China.

speaker Bio

Theresa Campobasso is the current Senior Vice President of Strategy at Exiger, the current Enterprise Supply Chain Risk Management solution for the US Government. She is a recognized expert in the field of Supply Chain Security and Resilience and advises the US Department of Defense, Congressional Committees, and other Federal clients on predicting, mitigating, and managing risks to critical US supply chains. Prior to her current role, Theresa built and led Exiger’s Defense business unit as the Vice President of Defense Programs and Global Head of Defense, where she expanded the Defense portfolio from 2 customers to over 30 over a period of 2 years.

Prior to joining Exiger, Theresa was the manager of Forensic Investigations and Critical Asset Protection at KPMG, where she led development of a software solution to predict and assess microelectronics supply chain risk in defense technology. The solution was selected as one of the winners of the 2019 International Test Conference by the U.S. Air Force. She also led an initiative to leverage advances in artificial intelligence, data science, and behavioral psychology to reform the national background investigation process for security clearances. These changes were implemented and are in use today.

In addition to her private sector experience, Theresa supported various operations and exercises in the Asia Pacific region as a Marine Corps Intelligence Officer with Marine Air Group 12. She also supported intelligence operations in Iraq and supported special operations missions with Naval Special Warfare units in Afghanistan.  After leaving active duty, she provided contract counterintelligence support to DIA’s Office of Counterintelligence as an analyst for emerging technology supply chain risk, operational risk management, and acquisition risk management, and helped to stand up the DIA Acquisition Risk Task Force.

Theresa earned her bachelor’s degree in English from the University of Notre Dame and her graduate degree in Technology & National Security from the Georgetown Security Studies Program. She is a 2017 Rumsfeld Foundation Fellow, a Certified Insider Threat Program Manager from the Carnegie Mellon Software Engineering Institute, and a graduate of the Harvard Business School CORe Program.

Global Product Manager (Electronics) KYZEN Corporation
Vice President Philadelphia SMTA Chapter   

SUMMARY/ABSTRACT

This session centers on resolving durability concerns pertaining to PCBAs in e-Mobility infrastructure, encompassing electric vehicles, charging stations, and Battery Energy Storage System. The session delves into assembly design challenges and offers solutions for constructing more dependable systems. Through a collaborative study involving Indium, KYZEN, and Dow, three industry experts present valuable insights to improve uptime performance, thus mitigating costly warranty repairs and enhancing customer satisfaction. The session aims to provide practical strategies for enhancing the reliability of e-Mobility components and optimizing the overall user experience.

SPEAKER BIO

Debbie Carboni is the Global Product Manager of Electronics for KYZEN Corporation and brings over 25 years of experience to the electronics manufacturing industry.  She continues to learn and stay up to date on the latest technology by attending technical conferences and assisting in leading-edge research.

Debbie has authored and co-authored several papers related to cleaning solutions and regularly presents at and attends industry events, participating member of numerous industry organizations and committees. Having worked hand in hand with both OEMs and their suppliers to develop and implement global cleaning process stability in production conditions. Debbie is devoted to giving back to the industry, serving as VP of Expos on the SMTA Board of Directors (2014-2020), current Vice President of the Philadelphia SMA Local Chapter, as well as various SMTA and IPC committees, including the IPC E-mobility, Quality & Reliability Advisory Council. A strong advocate of women in the industry, Debbie is a very active member of the SMTA Women’s leadership committee and participates regularly in annual and focused events.   

Her extensive real-world experience helps guide engineers during qualification to ensure success in production conditions. Always willing to share, Debbie is an excellent resource with extensive experience and passion.  

 You are welcome to call or email Debbie for answers to your questions at debbie_carboni@kyzen.com or +1 215-498-8856.

CTO
PCB Technologies 

SUMMARY/ABSTRACT

RF/Microwave & highspeed boards required many considerations and aspects for maximizing thermal and electrical performance. Designers for high frequency applications must understand critical parameters at the PWB stage. These parameters must be understood in order to eliminate noise, reliability, poor electrical performance, high price and low yield risks. The presenter will highlight innovative solutions, based on close cooperation between Mil/Aero designers and the PWB vendor. Actual field performance sometimes demands “beyond IPC rules/specification”, and in that respect one must provide innovative solutions such as: Implementing Air cavity, Coin and buried passive components (resistors/ capacitors/ thermocouples/ heaters etc.), in a complex design. This is even more critical, when the hybrid/mixed materials are combined into a rigid flex stack up. Enabling designers to bring an innovation to fruition, with ALL material types in the same stackup, selective final finishes, back drill/deep cone drill/ HDI, so the compatibility between all technical requirements, is optimized will be explored during this discussion.

Electrical Engineer, IIoT Product Operations
Cisco Systems

SUMMARY/ ABSTRACT

When you hear the words “high reliability,” what do they mean to you?  In this panel session, industry experts will provide their definitions of high reliability and what they, as consumers and citizens of the world, expect of high reliability products.  This will set the stage for the presentations and discussion that follow during the 2023 IPC High Reliability Forum.