Welcome to IPC's collection of technical papers presented at conferences since 2002. You can search by author, title and keyword. You can also search for keywords and topics in the Tag field. Access to the papers is reserved for IPC members.

The Importance of CTE in Multi-Layer Registration and Improved Measurement Methods

The current worldwide market for printed circuit boards is approximately $40 billion,with the multi-layer printed circuit boards (MLB) comprising approximately 40% of the market. One of the mos .. weiterlesen
Author(s)
Donald E. Yuhas,Carol L. Vorres,Howard R. Elliott,Kathy Kelly
Event
IPC APEX EXPO 2005

Embedding Passive and Active Components in PCB - Solution For Miniaturization

The miniaturization of the electronics continues and requires the utilization of inner space of a PCB for component placement. The embedding of the passive components inside the PCB has already .. weiterlesen
Author(s)
Tarja Rapala-Virtanen,Kimmo Perälä,Risto Tuominen,Petteri Palm
Event
IPC APEX EXPO 2005

Novel Substrate for Use as Embedded Capacitance: An Easy to Process Higher Dk Material

We have previously published our work on developing thin substrates for use as embedded capacitor layers. Both unfilled and filled materials were characterized in regards to performance,reliabi .. weiterlesen
Author(s)
John Andresakis,Takuya Yamamoto,Pranabes Pramanik,Nick Biunno
Event
IPC APEX EXPO 2005

Trimming Embedded Resistors Using Available PWB Equipment Technology

By using two existing pieces of common printed wiring board manufacturing equipment,embedded resistor manufacturers can obtain laser trim results similar to the trimming obtained using a specia .. weiterlesen
Author(s)
Dennis Fritz,Dave Sawoska,Frank Durso,Ted Martin,Gabor Kardos,Leah Hauswirth,Chip Hasey,Craig Coffman
Event
IPC APEX EXPO 2005

The Latest Technical Trend of Dry Film Photo Resist

This paper describes the performance of several types of the most advanced Dry Film photo Resist (DFR),for producing high-density package substrates and chip on films (COF). 1) High resolution .. weiterlesen
Author(s)
Hiroaki Tomita,Toru Mori,Shoichiro Tonomura
Event
IPC APEX EXPO 2005

The Development of Dry Film Photoresist with 15um Lines and Spaces Resolution for Semi-Additive Processing

Next generation IC substrate designs will feature higher interconnect density and faster signal speed than current designs. Circuitization of these substrates uses copper pattern plating follow .. weiterlesen
Author(s)
Hidetaka Uno
Event
IPC APEX EXPO 2005

High Yields and Low Costs Liquid Resists

In the multilayer PCB industry,the process of making the inner layer is the first step in a number of complex steps that results in the production of a printed wiring board. This imaging manufa .. weiterlesen
Author(s)
Danny K. L. Cheung,Brian D. Amos,Tina Marabello,Kevin Horgan,Kevin Cheetham
Event
IPC APEX EXPO 2005

Practical Lead-Free Implementation

Environmental regulations are forcing the elimination of lead (Pb) from electronic equipment. 2005 will be the year that many electronics assemblers will be transitioning their soldering proces .. weiterlesen
Author(s)
Chrys Shea,Bruce Barton,Joe Belmonte,Ken Kirby
Event
IPC APEX EXPO 2005

Low Cost Lead Free Solution Evaluation for Electronic Consumer Applications

Lead products are no longer an option if you want to export to the EU market. RoHS regulations requiring the manufacture of lead-free electronic products by July 2006 are pushing the industry t .. weiterlesen
Author(s)
Krishna Darbha,Nicoletta Sangalli
Event
IPC APEX EXPO 2005

Lead-Free Product Transition: Impact on Printed Circuit Board Design and Material Selection

Electronic products are being stressed by increasing operating temperatures and higher assembly temperatures. Silicon and product power consumption are increasing as the silicon densities and s .. weiterlesen
Author(s)
Gary Brist,Gary Long
Event
IPC APEX EXPO 2005

A Study on Coplanar Structures for High Speed Transmission

Demand for higher speed digital signal processing is notable today in the electronics industry. To meet this demand,circuit designs that employ coplanar structure,either for both single-end and .. weiterlesen
Author(s)
Isao Kaneda,Yukitaka Shirakura,Hirosi Iinaga,Hideo Takakusagi
Event
IPC APEX EXPO 2005

Non-Classical Conductor Losses due to Copper Foil Roughness and Treatment

In high speed digital interconnects; signal attenuation is a result of both dielectric losses and conductor losses. Previous works have showed in detail,the characterization and modeling effort .. weiterlesen
Author(s)
Gary Brist,Stephen Hall,Sidney Clouser,Tao Liang
Event
IPC APEX EXPO 2005

High Power LED and Thermal Management

A high-power-SMD-LED (HL-LED) outline 3,3 x 2,9 mm² was developed,with chip-size up to 1 mm² and power dissipation up to 1.500 mW (400 mA for UV-InGaN) in a corresponding thermal ambient. The t .. weiterlesen
Author(s)
Adrian O. H. Mahlkow
Event
IPC APEX EXPO 2005

Advanced Filled Via Plating Methodology

This paper describes Advanced Filled Via Plating Methodology for stacked via technology. In this paper,via bottom crevice, via bottom land etching and electroless copper plating coverage is foc .. weiterlesen
Author(s)
Takayuki Haze,Seungchul Kim,Changhyun Nam,Seokwon Ahn,Jung Hwan Park,Sujin Kim
Event
IPC APEX EXPO 2005

Optimised Vertical Process for Microvia Filling and Through Hole Metallization Under Production-like Conditions

This article summarises how a copper metallization process for simultaneous via filling and through hole plating was developed on a laboratory scale and the challenges encountered by scale-up t .. weiterlesen
Author(s)
Han Verbunt,Danis Isik,Ulrich Schmergel,Jean Rasmussen
Event
IPC APEX EXPO 2005

FVSS (Free Via Stacked up Structure)

The miniaturization of mobile electronic devices continues,market trends toward lighter and thinner printed circuit boards (PWB) have been accelerating. At the same time,the demand for increase .. weiterlesen
Author(s)
Michimasa Takahashi,Katsumi Sagisaka,Sotaro Ito,Hiroyuki Yanagisawa
Event
IPC APEX EXPO 2005

Design for Manufacture – Ceramic Thick-Film Embedded Capacitors

Embedding discrete capacitors right into printed circuit boards (PWB),although not new,is part of a pivotal technology for the PWB industry. For example,the ability to locate decoupling capacit .. weiterlesen
Author(s)
William Borland,Richard Snogren
Event
IPC APEX EXPO 2005

Electrical Behavior of Thin Film Embedded Decoupling Capacitor in Printed Circuit Boards

In this study,we developed the thin film embedded decoupling capacitors and experimentally investigated its electrical behavior in terms of power-ground impedance and simultaneous switching noi .. weiterlesen
Author(s)
Seokkyu Lee,Jongkuk Hong,Changsup Ryu,Byungkook Sun,Hyungsoo Kim,Joungho Kim
Event
IPC APEX EXPO 2005

Materials for Capacitor Embedding in PWBs

We have developed a new resin-coated-foil (RCF) material named MCF-HD-45 to be embedded in PWBs to constitute capacitors. The material is composed of a thermosetting resin and a high dielectric .. weiterlesen
Author(s)
Kazunori Yamamoto,Yasushi Shimada,Yasushi Kumashiro,Yoshitaka Hirata
Event
IPC APEX EXPO 2005

Removal of Palladium Residue in Semi-Additive Process for Enhanced Reliability in

In order to satisfy the ever-increasing demand for smaller and lighter electronic devices,a drastic miniaturization is making rapid progresses for even circuit features on printed wiring boards .. weiterlesen
Author(s)
Daisaku Akiyama,Terukazu Ishida,Masayo Kuriyama,Ryo Ogushi
Event
IPC Fall Meetings 2005

Wiring Process by Electrophotography and Electroless Plating

For the purpose of mask-less manufacturing for Printed Circuit Board (PCB),a new process using electrophotography technology,principle of copy machines,has been proposed and evaluated. Wiring p .. weiterlesen
Author(s)
Naoko Yamaguchi,Hideo Aoki,Chiaki Takubo
Event
IPC APEX EXPO 2005

Oxidation and Topography of Powder in Pb-free Solder Paste

There are compelling reasons to study the relationship between oxidation and the topography of solder powder; these include the following: ?? Customer requirements to reflow SAC-based (SnAgCu) .. weiterlesen
Author(s)
Ineke van Tiggelen Aarden,Eli Westerlaken
Event
IPC APEX EXPO 2005

The Effect of Ni on the Microstructure and Behaviour of the Sn-Cu Eutectic Lead-free Solder

While the Ni-stabilized Sn-0.7Cu alloy is now well established as a viable lead-free solder in large scale commercial printed circuit board assembly the effect of Ni is not yet fully understood .. weiterlesen
Author(s)
Keith Sweatman,Tetsuro Nishimura
Event
IPC APEX EXPO 2005

Lead Free Flip Chip and Chip Scale Package Inspection: New Challenges Will Require New Inspection Technologies

Lead free implementation will present new challenges for PCB manufacturers from a design,soldering process,and QC standpoint. The higher reflow process temperatures will cause greater thermal s .. weiterlesen
Author(s)
Mark Cannon,Juergen Friedrich
Event
IPC APEX EXPO 2005

OEE,the New Gauge on the Dashboard for the PCB Assembly Industry

OEE (Overall Equipment Effectiveness) is commonly used in a wide range of businesses when it comes to measuring and monitoring manufacturing performance. Even though OEE has been applied in var .. weiterlesen
Author(s)
Henning Mærkedahl
Event
IPC APEX EXPO 2005

An Open Standards Based Approach to the Exchange of Data in an Automated Electronics Assembly Operation

A tier one supplier to the automotive industry has determined that a key to staying competitive in the electronics manufacturing industry is to adopt open standards for the exchange of data. Sp .. weiterlesen
Author(s)
Louis Watson
Event
IPC APEX EXPO 2005

Optimizing Production Cost with Electronic Manufacturing Simulation

Factory simulation has been used extensively to optimize and reduce costs across many manufacturing disciplines. Unfortunately,general purpose factory simulators do not effectively model the sp .. weiterlesen
Author(s)
Chet Palesko
Event
IPC APEX EXPO 2005

Filling Pastes in PCB Production – Fields of Application,Possibilities and Limitations

In the past the use of filling pastes in PCB production was largely limited to via hole fillers. These materials with a solids content of 100% are still successfully employed today to close via .. weiterlesen
Author(s)
Sven E. Kramer
Event
IPC APEX EXPO 2005

The Feasibility of Blind Via on PTFE-FR4 Laminated Multi-Layer PCB

PTFE-FR4 hybrid laminated multi-layer PCB technology is being applied more and more widely. This technology requires blind via fabrication in a PTFE core. This paper gives a picture of the manu .. weiterlesen
Author(s)
Kong Lingwen
Event
IPC APEX EXPO 2005

Backdrilling Technology for Backpanel

In order to get excellent signal Integrity,half PTH holes will be a new trend in high frequency backpanel designing. Backdrilling is necessary for this application. This paper explores the appl .. weiterlesen
Author(s)
Zeng Ping,Kong Lingwen
Event
IPC APEX EXPO 2005

Direct Immersion Gold as a Final Finish

In this study,the DIG process (Direct Immersion Gold),is investigated. DIG is a process in which gold is plated directly on copper as a surface finish for printed circuit board and package appl .. weiterlesen
Author(s)
Shigeo Hashimoto,Masayuki Kiso,Yukinori Oda,Horshi Otake,George Milad,Don Gudaczauskas
Event
IPC APEX EXPO 2005

Characterization,Reproduction,and Resolution of Solder Joint Microvoiding

Microvoids are tiny voids in solder joints and differ from the more well known solder joint voiding in their individual size and location. The microvoids discussed herein are described as an ab .. weiterlesen
Author(s)
Donald P. Cullen
Event
IPC APEX EXPO 2005

Implementing Laser Marking of Printed Circuit Boards

Manufacturers of electronic devices,from home audio equipment to automotive keyless entry systems,are increasingly seeking a reliable,cost effective method for uniquely identifying and tracking .. weiterlesen
Author(s)
Rick Stevenson
Event
IPC APEX EXPO 2005

Conductive Polymer Imaging For Communications and Electronics

Conductive inks and polymers based on metals were originally envisaged for quick repairs to Printed Circuit Boards (PCBs) and semiconductor chips. Increasingly these materials are being used to .. weiterlesen
Author(s)
Richard Mosses
Event
IPC APEX EXPO 2005

Optimization of Lead-Free Soldering Processes for Volume Manufacturing

In this paper,a comprehensive review is provided on the optimization of soldering processes (including reflow,wave soldering,and rework),for different component types,different PCB sizes and fi .. weiterlesen
Author(s)
Dongkai Shangguan
Event
IPC APEX EXPO 2005

Lead-Free Solder Flip Chips on FR-4 Substrates with Different Assembly Processes and Materials

This study is focused on using different assembly options such as dip fluxing,flux jetting and reflow encapsulate for 200- 250um pitch lead-free (SnAgCu) flip chips on FR4 substrates. The impac .. weiterlesen
Author(s)
David Geiger,Dongkai Shangguan,Jonas Sjöberg,Todd Castello
Event
IPC APEX EXPO 2005

New Concept Multi-Layer FPC “SBic” For High-Density Device Mounting

We have developed a thin,high-density device-mounting,multilayer flexible printed circuit (hereinafter flexible printed circuit is referred to as FPC) “SBic” (stands for Solder Bump Interconnec .. weiterlesen
Author(s)
Toshiaki Chuma,Toshio Komiyatani,Mikihiko Ishibashi
Event
IPC APEX EXPO 2005

Flexible PCB Plating Through Hole Considerations,Experiences and Solutions

Due to the worldwide increase in demand for flex and flex-rigid panels as well as the shift in the required designs of panels there is an extreme need for improved PTH processing. There are sev .. weiterlesen
Author(s)
Neil Patton
Event
IPC APEX EXPO 2005

Environmentally Friendly Low Transmission Loss Base/Multilayer Materials

The frequencies used to communicate and process information have been extended beyond the GHz band to the microwave band to handle the growing volume of data. Moreover,increasing global interes .. weiterlesen
Author(s)
Hiroshi Shimizu,Kenichi Tomioka,Shinji Tsutikawa,Nobuyuki Minami,Yasuhiro Murai
Event
IPC APEX EXPO 2005

Novel Material having Low Transmission Loss and Low Thermal Expansion designed for High Frequency Multi-layer Printed Circuit Board Applications

A new multi-layer PCB (printed circuit board) having low transmission loss and low thermal expansion that meets up-coming further high speed and high volume data transmission demands was develo .. weiterlesen
Author(s)
Hiroaki Fujiwara,Hiroharu Inoue,Shoji Hashimoto,Mitsuhiro Nishino,Kiyotaka Komori and Tatuo Yonemoto
Event
IPC APEX EXPO 2005

Semiconductor Technology ITRS Roadmap

For four decades,the semiconductor industry has distinguished itself by the rapid pace of improvement in its products. The principal categories of improvement trends are shown in Table 1 with e .. weiterlesen
Author(s)
Alan Allan
Event
IPC APEX EXPO 2005

System in Package: Identified Technology Needs from the 2994 iNEMI Roadmap

System in package (SiP) technology has grown significantly in the past several years. It was barely mentioned in the National Electronics Manufacturing Initiative’s (NEMI’s) 2000 roadmap,but by .. weiterlesen
Author(s)
James Mark Bird
Event
IPC APEX EXPO 2005

Roadmap to Compliance: The Role of Electronic Data Exchange in Supporting the European Union RoHS and WEEE Directives

The upcoming European Union RoHS and WEEE directives are driving new requirements for the management and exchange of information,both across the extended electronics manufacturing value chain,a .. weiterlesen
Author(s)
Richard Kubin
Event
IPC APEX EXPO 2005

Site-Specific Measurement of Cathodic Pulse Shape and Plating Current Density for Optimization of Pulse Plating Lines

Two important aspects concerning optimum performance of a (reverse) pulse plating line are (i) the uniform and correct pulse shapes anywhere on the PCB and (ii) the uniformity of the plating cu .. weiterlesen
Author(s)
Detlev Nitsche,Stefan Gerhold,Nasser Kanani
Event
IPC APEX EXPO 2005

The Property Research and Applications of Vertical Pulse Copper Plating

Horizontal and vertical pulse plating have been widely used for panel plating in PCB industry,but rarely used for pattern plating. This article analyzes and reviews the crystal structure,throwi .. weiterlesen
Author(s)
Su Peitao,Su Zhangsi
Event
IPC APEX EXPO 2005

A Performance Simulation Tool for Bipolar Pulsed PCB Plating

The copper plating process is one of the most critical steps in the high end PCB manufacturing process. Although the deposition inside through holes and blind holes is the key factor for reduci .. weiterlesen
Author(s)
Gert Nelissen; Bart Van den Bossche,Luc Wanten
Event
IPC APEX EXPO 2005

Understanding the Impact of Accelerated Temperature Profiles on Lead-Free Soldering

Traditional reflow profiles for lead-free soldering typically require longer processing times due to elevated peak temperatures and flux activation times defined by solder paste suppliers. Thes .. weiterlesen
Author(s)
John L. Evans,Julius Martin,Charles Mitchell,Bjorn Dahle
Event
IPC APEX EXPO 2005

Maximizing Lead Free Wetting

As lead free assembly is ramping up,wetting of lead free solder pastes is surfacing as the major paste performance tradeoff. Global efforts to significantly increase lead free wetting chemicall .. weiterlesen
Author(s)
Richard Lathrop
Event
IPC APEX EXPO 2005

Effects of Cooling Slopes in Lead Free Reflow

As more electronic assemblers move to lead free SMT production,concerns are raised over reflow cooling slopes and effects on solder joints. Due to the higher peak temperatures,cooling slopes ar .. weiterlesen
Author(s)
Effects of Cooling Slopes in Lead Free Reflow
Event
IPC APEX EXPO 2005

Reliability and Requirement of HDI Blind Hole

Nowadays there are two major ways to achieve the conducting function of HDI Blind Hole One is to employ conducting metal paste to fill in the blind holes after laser drilling. The other is to f .. weiterlesen
Author(s)
Ma Zhibin,Ye Liting
Event
IPC APEX EXPO 2005