IPC Delivers Quality Electronics Events in Paris

On 3 and 4 October, 20 European IPC members and PCB professionals convened in Paris, France to attend the first IPC Tech-Ed event. During this two-day event, IPC offered instruction and tutorials from outstanding electronics industry experts.

With key topics ranging from robust coating process in the factory to selection of materials and processes for high reliability assemblies, best practices for electrostatic discharge (ESD), as well as reliability for solder joints, the event provided quality education and networking opportunities for attendees.

The first session focused on "Robust Coating Processes in the Factory: Methods, Critical Parameters, Problems, and Remedies" and was presented by Doug Pauls, highly regarded aerospace Materials Engineer from Rockwell Collins (USA). In addition, Doug is most notably known for his expertise in surface insulation resistance testing, cleaning and cleanliness assessment, conformal coatings, and how to qualify manufacturing processes.

His course focused on running robust conformal coating process in the factory, including factory setups and facilities considerations, preparatory processes before coating, masking materials and processes, coating processes, coating drying and curing; handling coating defects, addressing design-related coating challenges and more.

The second session was presented by Jean-Paul Clech, Ph. D., EPSI Inc. and explored "Solder Joint Reliability in Electronic Assemblies." Given the proliferation of lead-free solder alloys and the shortage of lead-free reliability data and predictive modeling tools, Jean-Paul stressed taking care of the basics as of the utmost importance to designers and product engineers having to build in long-term solder joint reliability. He presented numerous rules-of-thumb (do's and don'ts) based on established industry practices and known field failures for a proper design-for-reliability practices and emphasized generic guidelines that can be used to minimize the risk of solder joint failures in circuit board assemblies, regardless of solder composition.

The third Tech-Ed session focused on ESD Best Practices and Control Program of the Future and was presented by Hartmut Berndt from B.E.STAT European ESD Competence Centre. Hartmut explored the impact of electronic components getting smaller, reaching their limits in technology and also becoming increasingly sensitive to electrostatic charges and fields. The session explored all various errors and threats for ESDS and circuit boards, especially those arising in connection with automated factories (Industry 4.0 - "ESD Control Program of the Future"). The new ESD standards IEC 61340-5-1 (2016) and IEC 61340-5-2 (2017) as well as the ANSI/ESD S20.20-2014 are the basis for the ESD requirements.

The fourth Tech-Ed session was presented by Barrie Dunn from Portsmouth University and covered "Selection of Materials and Processes for High Reliability Assemblies." This course was based on Barrie's experience gained from more than 40 years' work in the space industry and contained a wide range of topics and lessons learned on variety of technical topics.