| HDI is one of the fastest growing markets in the PCB industry. In fact, year-on-year growth rates from September 2009 to September 2010 for HDI/microvia shipments in North America grew 140 percent. Without a doubt, HDI is very much a part of the present and future of the industry. |
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TECHNICAL WORKSHOPS — Tuesday, March 1 |
| 8:00 am–1:00 pm |
The registration for this workshop has reached capacity. If you are interested in being on a waiting list, please register for the course on-line. Your credit card will not be charged. We will notify you if space becomes available.
Creating a PCB Design with HDI Technology
Dan Smith, Designer, Northrop Grumman
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Learn the facts on when and where to implement HDI and how to create a design with HDI technology. You will learn:
- How to reduce surface area of the design
- How to reduce total layer number count
- General breakout concepts (BGA Breakout from 1.0 mm to 0.25 mm pitch devices)
- BGA Escape Routing - Channels and Boulevards
- Auto-routing strategies
- SI and PI analyses
- Frank questions to ask HDI fabricators
This hands-on course is designed primarily for PCB layout engineers, although it will give everyone the opportunity to be successful. Seating is limited.
Thanks to Mentor Graphics SDD for providing support for this workshop and for hosting it at their facility. |
| 2:00 pm–5:00 pm |
Advanced Microvia Structures for Next-Generation HDI Circuits
Thomas Buck, Senior Technologist, DDi
Migration of array packages to 0.5 mm and below are testing the limits of conventional printed circuit technologies. The implications are significant to both the design and manufacture of next-generation printed boards, since it will take an array of technologies to address signal integrity and increasing interconnect densities.
This workshop will explore production-viable solutions for advanced microvia structures, all with an underlying theme of high reliability and minimizing fabrication costs. Covered topics are all required for production of next-generation HDI circuits:
- material sets
- advanced plating technologies
- planar via techniques
- advanced imaging and registration systems
Finally, we will examine the complex set of design tradeoffs that are encountered when combining advanced technology sets into a single HDI design.
About the Instructor
Tom Buck is senior technologist at DDi; his responsibilities include technical product development and managing the Applications Engineering team. He has more than 30 years of experience in custom-designed high-performance electronic interconnection products for telecommunications, signal processing and advanced military systems. |
NETWORKING RECEPTION — Tuesday, March 1 |
| 5:30 pm-6:30 pm |
Northrop Grumman Corporation networking reception for all conference participants |
| TECHNICAL CONFERENCE AGENDA — Wednesday, March 2 |
| 7:30 am |
Check-in and Continental Breakfast |
| 8:00 am |
Welcome and Introductions
Karen McConnell, Manager, Electrical Design Automation, Northrop Grumman Electronic Systems Sector
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| 8:15 am |
Keynote: HDI and High Performance Technology Roadmap
James L. Armitage, Vice President & Chief Technology Officer, Northrop Grumman Electronic Systems Sector |
| 9:00 am |
Medical Industry Sector Requirements
Peter Tortorici, Ph.D., Process Development Manager, Medtronic Microelectronics Center |
| 9:45 am |
Design Considerations
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HDI Routing Solutions, Charles Pfeil, Director of Product Marketing, Mentor Graphics Corp.
- Signal Integrity, Rick Hartley, CID, Senior Principal Engineer, L-3 Avionics Systems Inc.
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| 11:15 am |
Materials Considerations
- Plating and Via Filling, Mike Carano, VP of Technical Operations for Electronic Chemicals, OMG Electronic Chemicals, LLC
- Photo resist, Dave McGregor, CID, Senior Development Associate, DuPont
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| 12:00 pm |
Lunch |
| 1:00 pm |
Process Considerations
- Via Configuration, Martin Neusch, Director of Field Application Engineering, Viasystems Group, Inc.
- Final Finishes, Martin Bayes, Ph.D., Research Fellow, Dow Electronic Materials
- Lamination, Jack Frankosky, OEM Marketing Engineer, Arlon MED
- Equipment for Fine Lines, Don Ball, Process Engineer, Chemcut Corp.
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| 3:15 pm |
Assembly Related Issues
Ian Williams, Technology Development Manager, Intel Corporation |
| 3:45 pm |
HDI Boards: Reliability Considerations
Roberto Tulman, VP Technologies & CTO, Eltek Ltd.
Jim Barry, President, Eltek USA. |
| 4:15 pm |
HDI Implementation: Practical Lessons Learned
Ron Evans, Vice President of Operations, Eagle Test Systems |
| 5:00 pm |
Adjournment |
To Register
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IPC Members |
Standard Rate |
Conference on March 2
Individual Workshop on March 1
Conference plus Two Workshops |
$500
$250
$750 |
$600
$350
$950 |
Exhibits
For information about opportunities for tabletop exhibits, contact MariaLabriola@ipc.org or call +1 847-597-2866.
Meeting Location and Hotel
The afternoon workshop, conference, lunch and reception will take place at:
National Electronics Museum
1745 West Nursery Road
Linthicum, MD
Phone: +1 410-765-0230
www.NationalElectronicsMuseum.org
IPC has blocked rooms at the:
La Quinta Inn and Suites
1734 West Nursery Road
Linthicum, MD
Phone: +1 410-859-2333
To secure the special IPC rate of $85, please state you are with IPC when making your reservation.
Rooms are available until all rooms are booked or until
February 7, 2011.
Rooms include complimentary Internet, deluxe continental breakfast, parking, airport shuttle (BWI) and shuttle to the National Electronics Museum.
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