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IPC Package-on-Package Workshop
IPC High Reliability Workshop
IPC/Cisco Head-in-Pillow Workshop

Pop  Crackle

THE LAST THING YOU WANT TO HEAR IN THE ELECTRONICS ASSEMBLY PROCESS!

Pop ... Crackle ...
Take the potential for pops and crackles out of your assembly process with expert advice and peer discussion — join us for an in-depth look on the three hottest assembly topics. From troubleshooting to new applications, we’ll provide you with the information you need to achieve your assembly goals. Come hear essential industry information and solutions from knowledge experts in PoP, high reliability, and head-in-pillow.

IPC Package-on-Package Workshop: PoP Application, Requirements, Infrastructure and Technologies

To be announced for early 2011
Creation Technologies, Santa Clara, Calif.
Instructor: Lee Smith, Amkor

This course will take an in-depth view of the applications, market requirements, supply chain infrastructure and technologies associated with package-on-package (PoP).  
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Register Today: $300 members/ $400 nonmembers

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IPC High Reliability Workshop: Solving Problems with Reliability, Repair and Rework in the Lead-Free Era

Cheryl Tulkof

Rescheduled for February 2011. Please check back for new dates.
Hunter Technology Corp,
2921 Corvin Drive
Santa Clara, Calif.
Instructor: Cheryl Tulkoff, Senior Member of the Technical Staff, DfR Solutions

This session addresses potential reliability issues within lead-free processes, current state of industry knowledge and risk mitigation based on product design, materials, complexity, volumes and customer expectations of reliability. The session summary includes a roadmap for ensuring the reliability of lead-free product.

This presentation provides a focused but comprehensive discussion on potential reliability issues that can arise within lead-free processes. All areas of potential risk are examined. For each reliability concern, a brief description is provided, followed by the current state of industry knowledge and an opportunity for risk mitigation based upon the product design, materials, complexity, volumes, and customer expectations of reliability. A final summary provides the attendees a roadmap for ensuring the reliability of lead-free product.

What you will learn:

Refresher:

  • SAC background & alternative alloys
  • The Current State of Lead Free:
    • PCBs
    • Components
    • Solders
    • Wave and Rework
    • Reliability

About the Instructor:

Cheryl Tulkoff has over 15 years of experience in electronics manufacturing with an emphasis on failure analysis and reliability. She has worked throughout the electronics manufacturing life cycle beginning with semiconductor fabrication processes, into printed circuit board fabrication and assembly, through functional and reliability testing, and culminating in the analysis and evaluation of field returns. She has also managed no clean and RoHS-compliant conversion programs and has developed and managed comprehensive reliability programs.

Tulkoff earned her bachelor of mechanical engineering degree from Georgia Tech. She is a published author, experienced public speaker and trainer and a senior member of both ASQ and IEEE. She holds leadership positions in the IEEE Central Texas Chapter, IEEE WIE (Women In Engineering), and IEEE ASTR (Accelerated Stress Testing and Reliability). She chaired the annual IEEE ASTR workshop for four years and is also an ASQ Certified Reliability Engineer.

She has a strong passion for pre-college STEM (Science, Technology, Engineering, and Math) outreach and volunteers with several organizations that specialize in encouraging pre-college students to pursue careers in these fields.

Register Today: $400 members/ $500 nonmembers

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Join our host for a facility tour!
A complimentary facility tour will follow lunch at 12:30 p.m. for those who wish to participate. Per ITAR regulations please bring government issued ID such as a passport or drivers’ license in order to participate in the tour. Foreign nationals from proscribed countries will not be allowed to tour the facility.

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IPC/Cisco Head-in-Pillow Workshop: Awakening from Head-in-Pillow Defects — an In-depth Tutorial

head-in-pillow-solder-joint-defect

Rescheduled for February 2011. Please check back for new dates.
Cisco Systems, Inc., San Jose, Calif.
Event Host: Scott Priore, Cisco Systems, Inc.

Find out about how to tighten your process controls and locate the right materials to eliminate head-in-pillow defects in this in-depth tutorial. Elimination of head-in-pillow defect is paramount in maintaining high production yields and field reliability. In addition to a review of head-in-pillow defects in the industry, a panel of key industry leaders in assembly process development will address many aspects of HiP defects and mitigation techniques, including results of select case studies.
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Register Today: $275 members/ $375 nonmembers

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