IPC introduces a new event dedicated to the changing world of reliability in electronic modules, boards, assemblies and systems. Featuring comprehensive workshops and technical presentations, this summit is a continuation of the “Reliability Summit and IPC Reliability Survey” activities initiated in February and May 2007, based on the interest of IPC members.

Reliability methods and strategies to verify the sum and quality of the parts used in the process of making electronic equipment will be shared. While reliability methodology may vary by interconnection level, system reliability depends on property testing at each level.

The risks of improper reliability test protocols will be examined along with methodologies to establish appropriate test conditions. The Summit covers reliability program concepts, electrical design/analysis methods, and reliability test/evaluation approaches.

Attendees will gain an appreciation of the importance of reliability to system and product success, whether in a military or a commercial application. Participants will gain an understanding of the practices that are appropriate for different development situations, as well as the basics of implementing the practices cost effectively.

Who Will Benefit

Manufacturing and reliability engineers from companies of all sizes will gain a solid understanding of today's reliability technologies. The rules have changed — reliability test methodologies have become a collaborative activity between the end customer and the various suppliers in the chain. Reliability professionals and those in operations management will benefit as these new rules become an integral part of the performance qualification process. Test laboratory and reliability test equipment suppliers will contribute, as well as benefit, from this event.

Registration Information

Please register by April 4, 2008, to secure your seat at this event or you can register on-site. Complete the registration form and fax or mail to IPC. For more information, or if the registration deadline has passed, contact an IPC registration representative at +1 847-597-2861 or send an e-mail to registration@ipc.org.

Cancellation Policy: Cancellations received before April 11, 2008 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If you are unable to attend, you may send a coworker in your place.

Location and Hotel Accommodation

Workshop, technical presentations and summit will be held at Philips Healthcare, 3000 Minuteman Road, Andover, Mass. A block of sleeping rooms has been reserved at the La Quinta Inn & Suites, 131 River Road, Andover, Mass. To reserve your sleeping room, please contact the hotel directly at 978-685-6200 and ask for the IPC special rate of $64.00 per night. Rooms and rate are subject to change after April 1, 2008. The La Quinta Inn & Suites offers a free shuttle service to and from the hotel to Philips Healthcare.

A reliability plan is written, approved and then implemented to fulfill the validation process on the design for reliability (DfR) procedures and accelerated testing. Reliability testing activities follow documented procedures.

This workshop will provide:

• an overview on how to assure and achieve reliability,
• an understanding of the various reliability tests,
• the correlation of the test results to product reliability,
• a perspective on current reliability assessment projects,
• a risk assessment based on the underlying "physics-of-failure" and the statistical failure distribution. They put into context the design for reliability- procedures, the test and inspection processes and how to assess proper test protocol strategies within your test and inspection process.

Topics to be Covered

1:00 pm Overview of Design for Reliability – Dieter Bergman, IPC
This section develops a concept which starts during the design and continues through the processing steps. Information is provided that validates reliability and accelerated testing to endure the quality of the final product.

1:45 pm Understanding Reliability Tests – Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
This section establishes characteristics and comprehensive understanding of reliability testing performed on components, printed circuit boards and laminates, solder joints and final assembly. The test methods are identified and the testing process is explained to establish the over-stress of the test specimen.

2:30 pm Correlation of Accelerated Testing with Product Reliability – Werner Engelmaier, Engelmaier Associates L.C.
The correlation of product field performance compared to accelerated testing that was used to prove reliability will be explored. Test conditions are identified to simulate what the components, PCB interconnection and solder joints will experience during their life-cycle.

3:15 pm Break

3:30 pm Current Reliability Assessment Projects – Denny Fritz, SAIC, Inc.
Reports on the many industry projects that exist on a global basis which are intended to establish reliability methods, and characteristics of the various portions of electronic equipment will be discussed. Various consortia are each focused on a particular domain that identifies the strong and weak points of the product which the consortia has an interest.

4:15 pm Reliability Protocol Risk Assessment Strategies – John Fisher, Interconnect Technology Analysis, Inc.
The pros, cons and risk in eliminating the reliability test step from a new product introduction (NPI) will be identified. Some assumptions on reliability prediction can be made however, it is important to determine a clear and precise failure-for-life for the final product in the field.

About the Instructors

Dieter Bergman, IPC Director of Technology Transfer, has instructed PCB designers for more than two decades, and was instrumental in the development of the IPC-2221, as well as many other design-related IPC standards.

Dr. Reza Ghaffarian has nearly 30 years of industrial and academic experience. For the last fifteen years, he led R&D activities in BGA/CSP/CGA/SiP/MEM packaging/reliability and has been a consultant resource for all JPL/NASA’s projects. He received many award including the NASA Exception Service Medal for outstanding leadership and industrial partnership. He has authored more than 150 technical papers, co-editor of a CSP book, 4 book chapters, two guidelines, and currently writing a new book. He serves as technical Advisor/Committee to Microelectronics Journal, SMTA, IMAPS, IEEE IEMT/CPMT, and IPC. He received his Ph.D. in 1982 from University of California at Los Angeles (UCLA).

Werner Engelmaier has more than 42 years experience in electronic packaging and interconnection technology. He is the president of Engelmaier Associates, L.C., a firm providing consulting services on reliability, manufacturing and processing aspects of electronic packaging and interconnection technology. Prior to forming his own company, Engelmaier was a distinguished member of the technical staff at AT&T Bell Laboratories for 24 years. Engelmaier is the author of more than 170 technical publications. He chairs the IPC Committee on Product Reliability, is an IMAPS Fellow, received the IEPS Electronic Packaging Achievement Award and the IPC President’s Award, and is a member of the IPC Hall of Fame.

Denny Fritz is a part-time senior engineer with SAIC, Inc. in Bloomfield, Ind. His area of focus is the impact of lead-free technology on the repair of legacy military electronics assemblies, including the impacts of tin whiskers, solder joint reliability, cross contamination, copper erosion, and metal detection. Since April 1998, he has been a part-time independent technology consultant for MacDermid, Inc. He was editor of the Organic Board Fabrication section of the 2007 IPC Roadmap and wrote the Embedded Passives chapter in Coombs’ Printed Circuit Handbook, Sixth Edition. He is also the head of the North America delegation to JISSO International, a technology and standards review organization. He holds a B.S. in chemical engineering from Rose Hulman Institute of Technology and an M.B.A. in marketing from the University of Delaware.

John T. (Jack) Fisher has been in the PCB industry for 35 years, having worked at both IBM and most recently at ITRI (Interconnect Technology Research Institute). While at IBM, Fisher held several senior management and staff positions in maintenance, manufacturing and engineering in Endicott, N.Y. and Austin, TX. Fisher received IPC’s 1996 Chairman of the Board Award for his work to improve PCB interconnect technology and was elected to IPC's Hall of Fame in 2007. He has authored one book, written numerous papers for trade journals and conferences and is a member of Printed Circuit Design and Fab, editorial review board.

We expect a strong turnout for the tabletop display area during the conference breaks and lunch on April 15-16, 2008. Don't miss out on this opportunity to reach your audience. For pricing information and a tabletop application click here(.pdf).

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• Early Registration - Register by March 14, 2008, and save an additional 10% off the prices shown below.
• Group Discount - Register three individuals from your company at the same time and receive the fourth
  registration FREE. * Note: The discount will apply to the lowest cost registration.