IPC and the Jisso International Council (JIC) are sponsoring a technical seminar, May 21-22, 2008, to provide information on the latest trends in interconnection technologies used in electronic products. The seminar will be held in conjunction with the 2nd Jisso International Forum being hosted by Georgia Institute of Technology. Members of JIC, as well as technology leaders from industry will be speaking on environmentfriendly manufacturing, three-dimensional integration, interposer substrates, and standards activities.

Session topics include:
  • Overviews of major areas of the total packaging solution
  • Nano materials
  • The total package solution by Jisso level
  • Printed and embedded electronics
  • Reliability and quality
  • SiP, TSVs and 3–D packaging
  • Energy conservation and generation
 

Attendees will get a comprehensive view of both integrated electronics development and manufacture, in addition to valuable inputs on interconnect technologies that will impact the electronics industry over the next ten years. If you want to gain a comprehensive understanding of the key issues in electronic interconnections, this seminar is a must.

Who is JIC

The purpose of the Jisso International Council is to promote a strategic partnership among global organizations interested in the total solution for interconnecting, assembling, packaging, mounting, and integrating system design. The Jisso International Council is made up of key personnel from organizations within the electronics industry — EIPC, EECA, JARA, JEITA, JEDEC, JEC, Jisso Japan, JNAC, JPCA, iNEMI and IPC.

Registration Information

In order to secure your registration for this event, we encourage you to pre-register by May 9, 2008. For more information, or if the registration deadline has passed, contact an IPC registration representative at +1-847-597-2861 or send an e-mail to registration@ipc.org.

Cancellation Policy: Cancellations received before May 20, 2008 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If you are unable to attend, you may send a coworker in your place.

Location and Hotel Accommodation

Jisso and IPC are grateful to Georgia Institute of Technology for hosting this seminar. The seminar will take place at the Manufacturing Research Center (MARC) on the Georgia Institute of Technology campus located at 813 Ferst Drive N.W., Atlanta, Ga.

To find a hotel listing, directions to MARC, and local area maps, we encourage attendees to visit www.marc.gatech.edu/travel for travel information to Georgia Institute of Technology.

Forum Agenda — May 21, 2008
7:30 am REGISTRATION
8:00 am

Welcome and Introduction to JIF 2008

Denny Fritz, SAIC, Inc.

8:10 am

Welcome to Georgia Tech

Rao Tummala, Ph.D., Georgia Institute of Technology

Session 1: Overview of Major Areas of the TPS — Session Chair, Denny Fritz, SAIC, Inc.
8:30 am

Current Interconnect & Assembly Technology

Rao Tummala, Ph.D., Georgia Institute of Technology

9:00 am

Regional Comparison of Existing & Anticipated Electronics Environmental Regulations

Krista Botsford, Botsford Eco-Tech Partners (formerly 5-Trees)

9:30 am

Markets Driving Interconnect and Assembly Needs

Jan Vardaman, TechSearch International Inc.

10:00 am

BREAK

10:15 am

Improved Factory Performance through Standardized Communication

Andy Dugenske, Georgia Institute of Technology

Session 2: The Total Package Solution by Jisso Level — Session Chair, Dieter Bergman , IPC
10:45 am

The TPS: Jisso Level Definitions & Trends

Akikazu Shibata, JPCA

11:15 am

Module Packages: Technology, Infrastructure, Environment and Standards Issues

Bill Chen, ASE Group

11:45 am

Unit Packaging

Stanley Bentley, Diversified Systems Inc.

12:15 pm

How SiP, TSV & 3–D Microelectronic Packaging Yield Price/Performance Improvements & Keep Moore’s Law Viable Longer

Bill Chen, ASE Group

12:45 pm LUNCH

Session 3: Reliability & Quality — Session Chair, Jack Fisher, Interconnect Technology Analysis, Inc.

2:00 pm

Anisotropic Mechanical Properties of Sn and Sn-Rich Solders for Electronics
Yoshiharu Kariya, Shibaura Institute of Technology

2:30 pm

Trends in Product Reliability: What is Failing and Why?

Myra Torres, CALCE

3:00 pm

Effect of Process-Induced Voids on Isothermal Fatigue Resistance of Solder Joints
Qiang Yu, Yokohama National University

3:30 pm BREAK
Session 4: Thermal Management Solutions: Energy Conservation & Generation — Session Chair, Dick Otte, PROMEX Industries, Inc.
3:45 pm

Thermal Management of Microsystems: From Chips to Data Centers

Prof. Yogi Joshi, Georgia Institute of Technology

4:15 pm

Recent Advances in Organic Solar Cells
Dr. Benoit Domercq

4:45 pm

Leveraging FPGA Features to Address Power Management Challenges
Dieter Bergman, IPC

5:15 pm

NETWORKING RECEPTION & Casino Night

Sponsored by Georgia Institute of Technology

Forum Agenda — May 22, 2008
8:30 am

Welcome to JIF 2008 Day 2

Denny Fritz, SAIC, Inc.

Session 5 Nano Materials — Session Chair, David Norton, NanoDynamics Inc.
8:35 am

Nanotechnology and Electronics Standards

David Norton, NanoDynamics Inc.

9:05 am

Current & Anticipated Electronics Applications of Nano Materials

Kristin Abkemeier, Lux Research

9:35 am

Nano HSE and Worker Protection

Vladmir Murashov, Ph.D., National Institute for Occupational Safety and Health

10:05 am

BREAK

10:30 am

Progress and Prospects for Nano HSE

Vicki Colvin, RICE

Session 6: Printed & Embedded Electronics — Session Chair, Michael Weinhold, EIPC
11:00 am

Printed Electronics: Current and Anticipated Capability and Costs

Michael Weinhold, EIPC

11:30 am

Printed Board Technology Pressure

Henry Utsunomiya, Interconnect Technologies, Inc.

12:00 am

Current & Anticipated Printed Electronics Applications

Joe Fjelstad, SiliconPipe, Inc

12:30 pm

LUNCH

1:00 pm

Emerging Applications and Material Issues for Embedded Components

Karen Carpenter, TechSearch International Inc.

Session 7: SiP, TSVs & 3–D Packaging — Session Chair, Jürgen Wolf, Fraunhofer–Institut für Zuverlaessigkeit und Mikrointegration
2:00 pm

Facility Tour of PRC and MARC Laboratory

Dean Sutter, Georgia Institute of Technology

3:00 pm

Ultra Miniaturized Embedded Actives and Passives Research at Georgia Tech

Venky Sundaram, Georgia Institute of Technology

3:30 pm

3D System integration on Wafer Level - Requirements and Solutions

Jürgen Wolf, Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration

4:00 pm

Future Systems Packaging Beyond Organic Chip Carries and Organic Boards — All Silicone Systems Module (3D ASSM)

Ritwik Chatterjee, Georgia Institute of Technology

4:30 pm Adjourn

Registration Form

Implementing Advanced Interconnect Technology Solutions

2nd Jisso International Forum

May 21-22, 2008

Hosted by Georgia Institute of Technology — Atlanta, Georgia

(download PDF file of the registration form)

Looking for Savings?

  • Early Registration - Register by April 30, 2008, and save an additional 10% off the prices shown below.
  • Group Discount - Register three individuals from your company at the same time and receive the fourth
    registration FREE. * Note: The discount will apply to the lowest cost registration.

Registrant's Name

Job Title/Mail Stop

Company

Mailing Address

City/State/Postal Code/Country

Phone

Ext.

Fax

E-mail Address

IPC, JEDEC, iNEMI, JPCA, JEITA, EIPC Member $450

Nonmember $550

(Includes: Admittance to presentations, meeting materials, Wednesday and Thursday luncheons, and Wednesday networking reception.)

Charge my credit card (check one): Amex   Master Card  Visa   Diners Club

Your credit card will be debited for your registration fee. Member or nonmember price will be assessed based on current membership status. No receipt will be sent unless requested.

Cardholder Number:

Telephone:

Cardholder Name:

Expiration:

Signature:

Billing Address:

 

Payment by Mail, Wire Transfer or Fax:

To register by mail: Send check made payable to IPC to: 3491 Eagle Way, Chicago, IL, USA, 60678-1349. If you would like to send a wire transfer, please contact IPC's registration department at registration@ipc.org for banking information. To register by fax, please fax registration form along with credit card information to +1 847-615-5661.

Cancellation Policy: Cancellations received before May 20, 2008 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If you are unable to attend, you may send a coworker in your place.

Please contact us at registration@ipc.org if you have questions or if you a have disability requiring accommodations.
IPClogo