Today’s consumers expect each new generation of personal entertainment and portable handset products to be smaller, thinner, lighter in weight … and loaded with even greater functionality. How can electronics manufacturers offer a product that meets all those functional and performance expectations without increasing product cost? Many companies are turning to IC packages that are no greater than the die element.
A wide range of choices exist today for assembly of ultra-fine-pitch wafer level and die-size surface mount devices. Although solder remains the most common method for device attachment, a number of alternative methods — such as the use of conductive polymers and ultrasonic gold-to-gold interface — have been developed to reliably secure the miniature die-sized elements to the circuit structure.
About the webcast:
In this one-hour webcast, participants will get a solid overview of current wafer level and die-size package technologies, plus explore common assembly process options, attachment material variations and manufacturing methodologies detailed in the new IPC-7094 document, Design and Assembly Process Implementation for Flip Chip and Die Size Components.
Topics to be covered include:
- Current wafer level and die-size package technologies
- Equipment requirements for board-level assembly
- Attachment methodology and alternative materials
- Criteria for qualification testing and inspection
The push for higher density IC packaging will expand with every new generation of consumer electronics. Don’t miss this opportunity to delve into the growing trend toward smaller packages!
About the webcast Instructor:
Vern Solberg is a consultant specializing in surface mount and microelectronic design and assembly. He holds several patents for IC packaging innovations (including the folded-flex 3-D package). He has more than 25 years of experience in design and manufacturing for commercial and aerospace electronic products and is the author of Design Guidelines for Surface Mount and Fine-Pitch Technology, published by McGraw-Hill. He is the chairman of a task group for IPC-7094, Design and Assembly Process Implementation for Flip Chip and Chip Size Packaging. |