Electronic packaging technologies are now generally recognized as the gatekeepers of system performance. By addressing the packaging needs of future electronic products, the electronics industry can continue driving its long-standing successes in meeting performance, cost and size demands for electronic products. IPC announces an exceptional seminar that will bring electronics industry leaders together to discuss and assess the key enabling technologies and industry dynamics that are driving advanced packaging techniques.

Attendees will be updated on current and future technology solutions. Get projections as to where advanced packaging techniques are headed both in design and manufacturing. This seminar will serve as an invaluable tool to attendees in crafting their companies’ business and technical strategies.

This seminar will attract an audience of innovative technologists, business managers and other industry leaders and will be an excellent opportunity to meet and exchange ideas with peers. Join your colleagues in charting the future direction of the electronic interconnection and packaging industry. It is an opportunity that should not be missed.

Location and Hotel Accommodation

The technical conference will be held at the Ramada Silicon Valley, 1217 Wildwood Ave., I-101 at Lawrence Expressway, Sunnyvale, Calif. To reserve your sleeping room, please contact the hotel directly at +1 408-245-5330 or via e-mail at info@ramadasv.com.

Registration Information

Please register by May 30, 2008, to secure your seat at this event. Complete the registration form and fax or mail to IPC. For more information, or if the registration deadline has passed, contact an IPC registration representative at +1 847-597-2861 or send an e-mail to registration@ipc.org and ask for the special IPC rate of $104.00 per night. Rooms and rate are subject to change after May 17, 2008.

Cancellation Policy: Cancellations received before May 30, 2008 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If you are unable to attend, you may send a coworker in your place.

Technical Conference Agenda

8:00 am	REGISTRATION
8:30 am	Semiconductor Packaging Roadmaps Dieter Bergman, IPC
9:00 am	IC Packaging Technologies Jim Walker, Gartner/Dataquest Technology and Service Provider Research
9:30 am	Signal Integrity Doug Brooks, UltraCAD Design, Inc.
10:15 am	BREAK
10:30 am	Interconnection Technology Joseph O'Neil, Hunter Technology
11:00 am	Assembly and Box Build TBD
11:30 am	Operating Environment Requirements Vern Solberg, Solberg Technical Consulting
12:00 pm	LUNCH
1:00 pm	Quality and Reliability Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
1:30 pm	Human Interfacing Dieter Bergman, IPC
2:00 pm	Energy Management: Production and End Use Joe Fjelstad, SiliconPipe, Inc.
2:30 pm	BREAK
2:45 pm	Prototype vs. Production Dick Otte, PROMEX Industries, Inc.
3:15 pm	Yield Problems Related to Package Design with Emphasis on Electrical Issues Bidyut Bhattacharyya
3:45 pm	Panel Discussion Moderator: Dieter Bergman, IPC
4:30 pm	ADJOURN

Media Sponsor

Design for Advanced Packaging Workshop — June 3-4, 2008

Hosted By Tessera Technologies Inc.

As technology advances, electronic packaging has become more sophisticated and complex. Many of the new IC device families have more leads and a finer contact pitch than their predecessors or dissipate more heat dramatically, affecting board design and assembly. When adapting these families of component packages one must consider the physical attributes and tolerances of the component package, board fabrication tolerances, assembly process methodology and related machine placement accuracy.

Increased electronic functionality can be achieved through the development of more complex silicon integration. Unfortunately, that route generally requires a great deal of capital resources and time. For that reason, many manufacturers will rely heavily on solutions such as integrating a number of already proven functional elements within a single-package outline described as Stacked Die Packaging. When adapting multiple die configurations, risk is minimized because each package becomes a fully tested subsystem that can be certified by the supplier before board or module level assembly.

The Design for Advanced Packaging workshop will cover many of the challenges and the risk associated with making the right decisions to adapt the newer component package innovations.

Dowload registration form PDF file here for the two-day workshop at Tessera Technologies.

Registration Form

Download PDF file of the registration form

Looking for Savings?

Early Registration – Register by May 30, 2008, and save an additional 10% off the prices shown below.
Group Discount – Register three individuals from your company at the same time and receive the fourth registration FREE. *Note: The discount will apply to the lowest cost registration.

Registrant's Name

Job Title

Company

Mailing Address

City/State/Zip Code

Phone

Ext.

Fax

E-mail Address

IPC member S350

Nonmember $450

Method of Payment:

Check enclosed in the amount of $____________ payable to IPC

Bill my credit card (check one):

Master Card

Visa

AMEX

Diners Club

Cardholder Name

Telephone

Card Number

Signature

Billing Address

Cancellation Policy: Cancellations received before May 30, 2008 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If you are unable to attend, you may send a coworker in your place.

Please contact us at registration@ipc.org or call +1 847-597-2861 if you have a disability requiring accommodations.