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The change to lead free solder has raised a stream of issues and problems on the manufacture, processing, and reliability of electronic products. This conference was designed to specifically address the challenges of reliability and reliability testing for lead free electronics.
IPC and JEDEC have joined forces to bring together the experts that will present the latest information and research findings on topics such as design for reliability, processing, and reliability and test.
Registration Information
Please register by March 26, 2007, to secure your seat at this event. Complete the registration form and fax or mail to IPC. The technical conference and tabletop displays will be held on April 10-11, 2007. Please see the conference agenda for specific times. For more information, or if the registration deadline has passed, contact an IPC registration representative at +1 847-597-2861 or send an e-mail to registration@ipc.org.
Cancellation Policy: Cancellations received before April 6, 2007 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If the events are cancelled, participants will receive a full refund. If you are unable to attend, you may send a co-worker in your place.
Location and Hotel Accommodation
The technical conference and educational courses will be held at the Courtyard Boston Tremont Hotel, 275 Tremont Street, Boston, MA. To reserve your room, please contact the hotel directly at +1 617-426-1400 and ask for the IPC/JEDEC Conference rate of $159 (single/double) per night. Rate is subject to change after March 19, 2007.
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Sponsorship Opportunities
Suppliers, manufacturers, and users of lead free electronics will be in attendance at this conference. Your company can showcase its services and products as a tabletop exhibitor or take advantage of one of the many sponsorship opportunities available for this conference.
View the list of available sponsorship opportunities here(.pdf) or contact Michelle Michelotti at +1 847-597-2822 or via e-mail at MichelleMichelotti@ipc.org.
Media Sponsors
Tabletop Exhibits
At this year's conference, we expect over 100 attendees to visit the tabletop display area during the conference breaks and lunches on April 10-11, 2007.
For pricing information and tabletop application here(.pdf).
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IPC and JEDEC would like to thank the members of the program committee:
| Jean-Paul Clech, EPSI |
Jennie Hwang, H-Technologies Group |
| Werner Engelmaier, Engelmaier Associates, L.C. |
Steve Huber, JEDEC |
| Reza Ghaffarian, Jet Propulsion Laboratory |
Christ Hunt, National Physical Laboratory |
| Craig Hillman, DfR Solutions |
Chris Mahanna, Robisan Laboratory Inc. |
| David Hillman, Rockwell Collins |
John Radman, Trace Laboratories - Denver |
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| Conference Agenda - April 10, 2007 |
| 8:30 am |
REGISTRATION |
| 9:00 am |
Via Reliability - A Holistic Process Approach
David Wolf, Conductor Analysis Technologies, Inc.
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| 9:45 am |
Reliability Challenges of Lead Free (LF) Plated-Through-Hole (PTH) Minipot Rework
Lunyu Ma, Ph.D, Intel Corporation
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| 10:15 am |
BREAK |
| 10:30 am |
FEA Based Fatique Life Predition for Different SAC Solders in Test and Service Environments
Rainer Dudek, Ph.D., Fraunhofer IZM
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| 11:00 am |
Strain Range Approximation for Estimating Fatigue Life of Lead Free Solder Interconnects Under
Temperature Cycle Loading
Michael Osterman, Ph.D., Center for Advanced Life Cycle Engineering (CALCE), University of Maryland
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| 11:30 am |
Accelerated Life Testing of SN100C for Surface Mount Devices: Vibration
Joelle Arnold, DfR Solutions |
| 12:00 pm |
LUNCH |
| 1:15 pm |
What are Other Companies Doing to Ensure Reliability in Their Lead Free Product?
TBD, Trace Laboratories, Inc. |
| 1:45 pm |
Lead Free Solder Inspection by X-Ray
Kathleen Brockdorf, Phoenix X-Ray Systems + Services GmbH |
| 2:15 pm |
Fatigue Life Prediction Methodology for Lead Free Solder Alloy Interconnects: Development and Validation
David Pierce, Ph.D., Stanford University |
| 3:00 pm |
BREAK
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| 3:15pm |
Shrinkage Hole Effect on Lead Free Pin through Hole Solder Joint Reliability
Aaron Unterborn, Solectron Technology, Inc. |
| 3:45 pm |
Evaluation of Sn-3.5Ag Based Solder Joint by Ball Impact Test
Hiroshi Nishikawa, Ph.D., Osaka University
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| 4:15 pm |
ADJOURN |
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| Conference Agenda - April 11, 2007 |
(*Note: Session 1 and Session 2 run concurrently in the morning ONLY) |
| Session 1 |
Session 2 |
| 9:00 am |
Solderability Comparison of Lead Free PCB Surface Finishes
Robert Kinyanjui, Ph.D., Sanmina-SCI Corporation |
9:00 am |
A Test Comparision of SAC and Non-SAC Lead Free Solders
Howard Stevens, Metallic Resources, Inc. |
| 9:30 am |
Impact of Surface Finish Choice on Reliability Test Results: Data Analysis of HALT Testing on the Reliant TV-3
David Cavanaugh, Benchmark Electronics |
9:45 am |
Selection of a Lead Free Wave Soldering Alloy
Robert Kinyanjui, Ph.D., Sanmina-SCI Corporation |
| 10:00 am |
Moisture Absorption Effects of Lead Free Reflow Processing on Tantalum SMD Capacitor Reliability
Mary Carter Berrios, KEMET Electronics Corporation |
10:15 am |
Characterization and Reliability of increased Cu Levels in SAC Alloys
Isabel De Sousa, IBM Canada |
| 10:45 am |
BREAK |
10:45 am |
BREAK |
| 11:00 am |
Reliability Concerns - Two Real Life Examples: BGA Warpage Moisture Sensitivity and Lead Free Components in a Conventional SnPb Process
Wolfgang Biben, CenPra-Centro de Pesquisas Renato Archer |
11:15 am |
Testing Lead Free Compatible Substrate Materials
Michael Kuszaj, Rogers Corporation |
| 11:30 am |
Soldering Products and Processes for High Drop-Shock Reliability
Brian Lewis, Ph.D. , Cookson Electronics Assembly Materials
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| 12:00 pm |
LUNCH |
| 1:00 pm |
Transition to Lead Free Electronics Assembly - Case Study Part II: Product Reliability and Forced Rework
Robert Farrell, Benchmark Electronics
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| 1:30 pm |
Photonics Reliability - Managing the Time Bomb
Nihal Sinnadurai, Ph.D., Advanced Technology - Transfer Associates (ATTAC) |
| 2:00 pm |
JCAA/JG-PP Lead Free Solder Testing for High-Reliability Applications: Test Vehicle Assembly & -55C to +125C Thermal Cycle Testing Results
David Hillman, Rockwell Collins |
| 2:30 pm |
Modeling of the JCAA/JG-PP Lead Free Solder Project Vibration Test Data
Tom Woodrow, Ph.D., Boeing Phantom Works |
| 3:00 pm |
BREAK |
| 3:15 pm |
Using IPC/JEDEC-9704 & 9702 Standards for Strain Gage Testing of Your Printed Wiring Boards
Swapnil Padhye, National Instruments |
| 3:45 pm |
Circuit Board Performance and Reliability using Lead Free Soldering Processes
Simon Mason, TWI Ltd |
| 4:15 pm |
ADJOURN
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| Educational Courses - April 12, 2007 |
T-01: Crafting of Lead Free Solder Process
Dave Hillman & Doug Pauls, Rockwell Collins
8:30 am - 4:30 pm |
This tutorial will help you understand the range of materials and process considerations that MUST be made for manufacture of reliable lead free hardware. What you need to know to craft an effective lead free solder process will be covered — the metallurgy involved; lead free finishes on boards and components and associated problems; effects on organic materials (i.e. laminates or resists) from higher reflow temperatures; fluxes and pastes; assembly processes and parameters; assembly equipment considerations; cleaning of lead free process residues; testing for residues; reliability testing and case studies; and environmental waste stream considerations.
Who Should Attend
Industrial engineers, reliability engineers, quality assurance personnel, or anyone with responsibility to design, implement, or monitor a lead free manufacturing process.
About the Instructors
David Hillman’s work has focused on materials and processes for military, avionics and high performance equipment applications. He has worked for General Dynamics, Convair and Rockwell Collins. Hillman is a leader in IPC’s solderability task groups and is heavily involved in electronics materials. Dave Hillman holds a B.S. in metallurgical engineering and a M.S. in material science and engineering from Iowa State University.
Doug Paul’s career is centered on materials science and its relation to electronics manufacturing materials and processes. He has worked for the U.S. Navy, Contamination Studies Labs, and Rockwell Collins. Paul is a leader in IPC’s cleaning, coating, and materials test activities. He has a B.A. in chemistry and physics and a B.S. in electrical engineering.
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T-02: How to Specify PCBs for Lead Free Assembly
Werner Engelmaier, Engelmaier Associates, L.C.
8:30 am - 4:30 pm
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The high soldering temperatures required for lead free soldering pose reliability threats on printed circuit boards (PCBs)., This course will make recommendations regarding appropriate specifications and PCB drawing ‘FAB Notes’. The basic PCB base material properties with their needed values, and the reasons behind the need for these properties will be examined. Lastly, general procedures to assure that qualified PCB shops continue to produce PCBs of good quality are presented as well as the vital testing procedures to verify quality and reliability of PCBs.
Who Should Attend
Anyone concerned with or responsible for ensuring the quality and reliability of electronic products should attend, especially managers and engineers involved with the design, manufacture and assembly of printed circuit boards (PCBs). It is of special significance for individuals involved in high-reliability applications and/or the production of high-density electronic assemblies and applications requiring reliable operation in severe use environments and/or for long product lives.
About the Instructor
Werner Engelmaier has more than 37 years experience in electronic packaging and interconnection technology. Known as "Mr. Reliability," he is the president of Engelmaier Associates, L.C., a consulting firm specializing in reliability, manufacturing and processing aspects of electronic packaging and interconnection technology. Prior to forming his own company, Engelmaier was a distinguished member of the technical staff at AT&T Bell Laboratories for 24 years. Engelmaier is the author of more than 135 technical publications and has been awarded two patents. He chairs the IPC Product Reliability Committee and is a member of the IPC Hall of Fame.
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W-01: Lead Free Reliability for Harsh Environment Electronics
Jennie Hwang, Ph.D., H-Technologies Group
8:30 am- 11:30 am
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The question of whether lead free is reliable enough for harsh environment electronics will be rationalized by addressing twenty (20) key and provocative questions.
Based on the sustained development effort, testing data and manifold evaluations, this course dissects what it takes to perform in a harsh environment and the reasoning behind it. The question of whether a life-prediction model can assure reliability will be discussed. In addition, a relative reliability ranking among viable systems will be presented, along with the scientific, engineering and manufacturing reasons behind the ranking.
The scientific rationale behind SAC’s anticipated inferior performance to SnPb under certain conditions will be introduced. The course will also summarize which solder alloys are expected to perform in harsh environments and the material science behind it.
Who Should Attend
The course provides a higher level of working knowledge to all who are involved with or interested in the reliability of lead free packaging and assembling. It is designed for individuals who need broad-based information, as well as in-depth knowledge of test data vs. performance.
About the Instructor
Dr. Hwang has 26 years of experience in SMT manufacturing, 16 years in lead free R&D and actual production implementation knowledge. She has been a major contributor to surface mount technology since its inception. She serves as an advisor to major OEMs, EMSs and has consulted on projects including the DoD F-22 for the government. She has Ph.D., M.S., M.A. and B.S degrees in materials science & engineering, chemistry, and liquid crystal science, respectively. Among her many honors and awards are citations by the U.S. Congress; election to the National Academy of Engineering; and induction into the WIT International Hall of Fame. She is also the recipient of Distinguished Alumni Awards from her alma maters. Dr. Hwang is the author of more than 300 publications, including the sole authorship of several textbooks. She serves on the board of NYSE Fortune 500 companies, and various civic and university boards. Huang has held senior executive positions with Lockheed Martin, SCM Corp., Sherwin William Co., IEM Corp., and is currently a principal of H-Technologies Group.
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W-02: Understanding of J-STD-020 and -033A - Classification and Handling of Moisture - Sensitive ICs
Jack McCullen, Intel Corporation
1:00 pm - 4:00 pm
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This workshop will provide an overview of the IPC/JEDEC moisture/reflow classification tests and their evolutionary history. The presentation will cover: moisture/reflow classification and level determination for moisture-sensitive nonhermetic solid state surface mount devices (SMDs), new lead free reflow performance criteria, proper shipping and handling procedures for achieving safe and damage-free reflow assembly, baking procedures, and extended storage using moisture and de-rating. Shelf life and dry-bag sealing requirements will also be discussed. Information and technical background details will also be presented on topics such as: equivalent accelerated moisture exposure, proper low-humidity containment and baking procedures, moisture 'de-rating' tables and desiccant science.
Who Should Attend
Component manufacturers who want to expand their working knowledge of the IPC/JEDEC specifications; OEMs and EMS companies that want to understand the impact of the higher processing temperatures on the components they use, as well as the process they use to assemble them; and material/consumable suppliers who want to understand the rating process and how it translates to requirements on the shop floor.
About the Instructor
Jack McCullen is involved in lead free activities as part of the Corporate Quality & Reliability Group at Intel Corporation. He serves as the chairman of JEDEC 14.1 committee, is a U.S. National Committee chief delegate to IEC, and is an active member of JEDEC, NEMI and IPC standards committees. Prior to joining Intel in 1984, he worked for Motorola Semiconductor in Phoenix, AZ and Burroughs Micro Electronics Division in California. During his 37-plus year career in semiconductors, he has worked in assembly/test manufacturing and engineering for IC packages. McCullen has a B.S. in Electronic Engineering from Northrop Institute of Technology.
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Registration Form
IPC/JEDEC Global Conference on Lead Free Reliability
and Reliability Testing for RoHS Lead Free Electronics
April 10-12, 2007 - Boston, MA
(download the registration form as a pdf here)
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| Looking for Savings?
- Early Registration - Register by March 9, 2007, and save an additional 10% off of the prices shown below.
- Group Discount - Register three individuals from your company at the same time and receive the fourth
registration FREE. * Note: The discount will apply to the lowest cost registration.
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IPC/JEDEC Member |
Non-Member |
| Super Package (includes one tutorial OR two workshops plus the technical conference) Please fill in your tutorial or workshop of choice.
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$800 (U.S.)
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$1100 (U.S.)
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Conference Only - April 10-11, 2007 |
$550 (U.S.)
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$750 (U.S.)
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| Course Only (includes one tutorial OR two workshops). Please fill in your tutorial or workshop of choice.
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$450 (U.S.)
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$650 (U.S.)
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Cancellation Policy: Cancellations received before April 6, 2007 will be refunded in full. Refunds will not be issued after the start of the program. Individuals failing to cancel will be billed for the registration fee. If the events are cancelled, participants will receive a full refund. If you are unable to attend, you may send a co-worker in your place.
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