Professional Development Workshops and Certification
Electronics Midwest Workshops
A focus on industry standards and practical requirements will help ensure that you and your team are up-to-date on industry consensus requirements and expectations. Learn more about the standards you use or specify regularly and how to maximize your company’s operational efficiencies. Workshops descriptions will be posted by June 30. Workshops take place Monday, Wednesday and Thursday, September 27, 29–30.
Sign up by August 27 and take 20% off your registration. Registration will open by June 30.
View all of the special discount packages and other
registration options.
|
|
| Course Code | Course Description |
|
PD-01
|
|
What’s New in IPC-A-600H and IPC-6012C
|
| Monday, 9/27/2010 | 1:00 PM - 4:00 PM |
|
|
Instructor:
C. Don Dupriest, Lockheed Martin Missiles and Fire Control
|
|
Discover the drivers behind the revisions to IPC-6012C and its companion document, IPC-A-600H, Acceptability of Printed Boards. This workshop will dissect the new specifications to give you the practical knowledge you need to properly apply them to your product. Understand the engineering requirements behind the performance attributes specified in IPC-6012C, Qualification and Performance Specification for Rigid Printed Boards. Learn how to implement drawing notes to cover AABUS (as agreed between user and supplier) requirements to clearly communicate your engineering requirements. Copies of the standards will be provided.
|
What you will learn:
How IPC-6012C and IPC-A-600H impact:
• Fabrication processes behind the requirements
• Engineering performance drivers behind changes
• New copper cap plating requirements for filled vias
• Requirements for copper wrap plating
• New thermal stress methodologies
• Requirements for etchback and dielectric removal
• Requirements for laminate anomalies
• Supplemental requirements for space and military avionics
• Understanding frequency of lot inspection for product acceptance
• Requirements for new surface finishes such as electroless nickel/electroless palladium/immersion gold (ENEPIG), immersion tin and immersion silver
• Measles in printed boards — process indicator or defect condition?
|
About the Instructor:
Don Dupriest is a member of the production technical excellence staff within Lockheed Martin Missiles and Fire Control. Dupriest has more than 35 years experience in electronics manufacturing and is currently on the advanced manufacturing technology staff. A past recipient of the IPC President’s Award and a past chair and current member of the IPC Technical Activities Executive Committee, he has chaired the IPC D-30 Rigid Printed Board Committee and is current co-chair of the IPC D-35 Printed Board Storage and Handling Subcommittee.
|
|
|
|
|
PD-02
|
|
IPC-7351B Land Pattern: Reliable Footprint and Land Pattern Configuration in a Lead-Free Environment
|
| Wednesday, 9/29/2010 | 8:00 AM - 11:00 AM |
|
|
Instructor:
Dieter Bergman, IPC; Tom Hausherr, Mentor Graphics Corporation
|
|
Discover advances in surface mount land pattern design within the new revision B of IPC-7351. This workshop will describe the concepts behind IPC’s land pattern model for existing surface mount components, which provides three geometries for each component. Learn how to tailor solder fillet goals and dimensional tolerances through the use of supporting software tools. These tools help determine the robustness of the solder bond between the component terminations and the land patterns on the surface of the printed board.
This workshop will also provide background on the IPC standards development process and its role in the evolution of land pattern recommendations from IPC-SM-782 to IPC-7351.
Techniques for SMT and mixed assembly product application will be discussed and compared to criteria for determining end-use environment and identifying assembly types and their complexity. Automation techniques for establishing the library concepts needed for CAD systems will be described, along with how dimensional descriptions influence the completion of the design interconnect system.
|
What you will learn:
• Through-hole component criteria
• Connectors, headers & mechanical hardware
• Surface mount discrete components
• Semiconductor package styles and their attachment
• Design tool library creation capability
• Tailoring the calculator description
• Quad flat pack family descriptions
• QFN & PQFN families
• BGA & LGA package styles
• Future concepts for keeping pace with technology
• Land pattern and padstack naming conventions
|
About the Instructor:
Dieter Bergman will discuss standard and mathematical model development. He is the IPC director of technology transfer, with more than 50 years of experience in the electronics industry. Bergman supervised the Philco-Ford PCB advanced technology design group before joining IPC in 1974, and has instructed PCB designers for more than three decades. He was instrumental in the development of the IPC-2220 series on printed board design, in addition to many other design-related IPC standards.
Tom Hausherr, CID+ will discuss development of automated tools & CAD libraries. Currently the EDA library product manager for Mentor Graphics Corporation, Tom has been involved with more than 3,000 PCB layouts in his career. He helped IPC develop the IPC-7351 Land Pattern Calculator, which won the 2007 DesignVision award for the best new CAD software tool in the electronics industry. Hausherr has been honored with two IPC awards for participation in standards development.
|
|
|
|
|
PD-03
|
|
Packaging and Assembly in the New Decade – Materials and Processes
|
| Wednesday, 9/29/2010 | 1:00 PM - 4:00 PM |
|
|
Instructor:
Jennie Hwang, Ph.D., H-Technologies Group Inc.
|
|
This workshop focuses on new and emerging developments in solder materials, bare board, modular process and techniques of both lead-free and tin-lead (SnPb) assemblies. The advanced packages,such as package-on-package (PoP) and various BTCs will be reviewed. Best practices in assembling BTC (QFN, LGA, MLF) and PoP will be discussed as well as associated production defects and remedies.
Key principles and practices in solder paste deposition techniques (printing, dipping) and halogen-free solder paste will be outlined. The renewed interest in vapor phase soldering, and the optimal reflow profiling for lead-free soldering will be reviewed, along with PCB thermal properties, surface finish and halogen-free PCB laminates.
Selected production defects will be examined: head-on-pillow, PCB pad cratering, passive 01005 device assembly and copper dissolution. The state of the industry and new trends will be outlined. Attendees are encouraged to bring their issues to the workshop for discussion and solutions.
|
What you will learn:
• Overview of semiconductors, packages and assembly
• Advanced packages (PoP, BTC, etc.) challenges and applications
• PoP and BTC assembling best practices and defects mitigation
• New developments in solder paste and halogen–free flux
• Solder paste printing — rheology, desired performance, stencil design
• Solder paste dipping — paste rheology and process parameters
• Reflow techniques — convection vs. vapor phase
• Reflow profiling for lead-free assembly — best practices and optimal profile
• Selective soldering merits and process
• Thermal properties for lead-free assembly of printed boards
• New surface finish developments
• Halogen–free laminates
• PCB Pad cratering causes and solutions
• Head-on-pillow defect causes, factors and remedies
• Copper dissolution mitigation
• Passive 01005 device assembly process, factors and best practices
• Future trends for lead-free alloys, printed electronics and solar photovoltaics
|
About the Instructor:
Jennie Hwang, Ph.D. has experience in SMT manufacturing and lead-free electronics ranging from production yield to field failure diagnosis to reliability issues. She has held executive positions with Lockheed Martin Corp., SCM Corp, Sherwin Williams Co, and IEM Corp. Her work covers both commercial and military applications, including the U.S. Dept. of Defense F-22 program. Dr. Hwang holds four academic degrees, is a distinguished adj. professor of engineering at Case Western Reserve University and has 300+ publications to her credit.
|
|
|
|
|
PD-04
|
|
What’s New in IPC J-STD-001E?
|
| Thursday, 9/30/2010 | 8:00 AM - 11:00 AM |
|
|
Instructor:
Dan Foster, Defense Acquisition Incorporated; Teresa Rowe, AAI Corporation
|
|
If you use J-STD 001, Requirements for Soldered Electrical and Electronic Assemblies, as your basis for assembly and soldering requirements, this course is a must-attend. Revision E of this key industry document features changes that address evolving solder technology. Taught by the chairman of the J-STD-001 Task Group, this workshop will help you learn about specific requirement changes and the reasons behind them. A copy of the standard will be provided.
|
What you will learn:
How IPC J-STD-001E impacts:
• Materials (lead-free solder bath contamination limits)
• New hole-fill criteria
• New SMT termination styles
• Supplier flow-down
• Training for proficiency and rework
• Compatibility with other IPC documents, such as IPC-A-610E
|
About the Instructor:
Teresa Rowe is the director of quality for the logistics and technical services business unit of AAI. She is the chairman of the IPC J-STD-001 Task Group and the IPC J-STD-001 Repair Training Technical Task Group and the 5-22 Soldering Subcommittee.
Dan Foster is a senior analyst with Defense Acquisition Incorporated, supporting the Quality Department for the Missile Defense Agency. He has more than 25 years experience in electronics manufacturing training and rework. Foster is the vice chair of the IPC 5-22A J-STD-001 Task Group and the 7-34T Repair Training Technical Task Group . He was a Master Instructor in IPC standards 610, 620, 001, 7711/7721. Foster is a CIT in all of these standards.
|
|
|
|
|
PD-05
|
|
What’s New in IPC-A-610E?
|
| Thursday, 9/30/2010 | 1:00 PM - 4:00 PM |
|
|
Instructor:
Constantino Gonzalez, ACME Training & Consulting
|
|
IPC-A-610E, Acceptability of Electronics Assemblies, reflects the industry’s use of process control by re-categorizing many conditions as either defects or process indicators. This workshop will discuss the specification from a common sense “show me” perspective for understanding and applying the new criteria. Assess the impact these new requirements will have in your customer–supplier relationships. Learn the target conditions for all three classes of production and how target conditions differ from acceptable and defect conditions. A must for anyone responsible for the acceptability of printed circuit assemblies. A copy of the standard will be provided.
|
What you will learn:
• Surface mount criteria: new component leads, BGA criteria and solder contact with component body
• Soldering connection requirements: wetting requirements, intrusive soldering and lead-free criteria
• Mechanical assembly
• Depanelization criteria
• Flex criteria
• Particulate matter criteria
• Cleanliness no-clean vs. clean
• Process control indicators: form, fit, function
• Component damage
|
About the Instructor:
Constantino J. Gonzalez chairs the IPC 7-31 Acceptability Subcommittee and is a co-chair of the IPC-A-610 task group. Gonzalez has been chairman throughout all revisions of the standard and has extensive practical experience with the content. He is president of ACME Inc.
|
|
|
|
|
|
|
IPC Certification Courses and Testing
Separate registration is required for the certification programs.
Become a CID! IPC certified interconnect designers demonstrate their knowledge of industry standards and DfM. Demonstrate your commitment to excellence. Workshop and testing take place Thursday, September 30 through Saturday, October 2. Learn more about the benefits of designer certification.
EMS Program Manager Training and Certification Program. Make an investment in your team. Created by EMS senior leaders, IPC program manager training and certification enhances program management skills with segments on finance, assembly technology, project management, customer service, and problem solving. Learn more about EMS Program Manager certification and how to get a CEPM.
|
| |
8:00 am–5:00 pm |
IPC Introduction to EMS Program Manager Training and Certification Program
(Day One)* |
|
| |
8:00 am–12:00 pm |
IPC Introduction to EMS Program Manager Training and Certification Program
(Day Two)* |
| |
8:00 am–5:00 pm |
IPC EMS Leadership Training (Day One)* |
|
| |
8:00 am–5:00 pm |
IPC EMS Program Manager Training II (Day One)*) |
| |
8:00 am–5:00 pm |
IPC EMS Leadership Training (Day Two)* |
|
| |
8:00 am–12:00 pm |
IPC EMS Program Manager Certification Exam* |
| |
8:00 am–5:00 pm |
IPC EMS Program Manager Training II (Day Two)* |
| |
8:30 am–5:00 pm |
IPC PCB Designer Certification (CID and CID+) |
|
| |
8:30 am–5:00 pm |
IPC PCB Designer Certification (CID and CID+) |
|
| |
8:30 am–3:00 pm |
IPC PCB Designer Certification Exam (CID and CID+) |
*Components of IPC EMS Program Manager Training and Certification Program. Learn more about EMS Program Management certification and how to get a CEPM.
Back to top |
|
|
|